Digital display apparatus having jitter correction

Registers – Platform operated – Platform actuated traffic counters

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Details

235 92FQ, 235 92R, H03K 2132, H03K 2118

Patent

active

039625672

ABSTRACT:
A digital speedometer, frequency or event counter with digital display. The speedometer conventionally receives speed pulses representative of the speed of the vehicle. Due to the lack of synchronization between speed pulses and clock pulses the last display digit exhibits undesirable jitter. This may also be caused by backlash in the drive train or the like. This jitter is minimized by the provision of a precounter between the counter and the gate transfer to a storage register. This will permit transfer of the number generated in the counter only if the precounter is in the zero state, thus minimizing the jitter due to random occurrences of the last pulse.

REFERENCES:
patent: 3551809 (1970-12-01), Dufour
patent: 3602699 (1971-08-01), Kamachi
patent: 3728524 (1973-04-01), Gray
patent: 3818342 (1974-06-01), Stevens

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