Digital differential phase shift keyed demodulator

Details Digital differential phase shift keyed demodulator Digital differential phase shift keyed demodulator

1986-04-04

1987-12-22

Griffin, Robert L.

Pulse or digital communications

Repeaters

Testing

329124, 370 12, H04L 2722

Patent

active

047150475

ABSTRACT:
A differential phase shift keyed demodulator for demodulating a differential phase shift key modulated signal and synchronizing the clock thereof. To accomplish the demodulation, the differential phase shift keyed modulated signal is mixed with three reference signals offset by 120.degree.. This process creates three threshold boundaries in the XY vector phase plane and the three mixed signals are logically related to determine in which sector the instantaneous phase lies. The instantaneous phase at a first time is delayed for comparison with the instantaneous phase at a successive time. The result of this comparison process produces a signal representing the information. Synchronization of the data clock is accomplished by comparing the phase of the signal resulting from the demodulation at points midway between data decisions. The resulting signal from this comparison process controls a voltage-controlled oscillator such that when the clock is early the frequency of the voltage-controlled oscillator tends to increase, and when the clock is late the frequency of the voltage-controlled oscillator tends to decrease.

REFERENCES:
patent: 3983499 (1976-09-01), Tan
patent: 3997847 (1976-12-01), Tong
patent: 4007331 (1977-02-01), Flanagan
patent: 4010323 (1977-03-01), Peck
patent: 4096442 (1978-06-01), McRae et al.
patent: 4121050 (1978-10-01), Witt
patent: 4501002 (1985-02-01), Auchterlonie
patent: 4546322 (1985-10-01), Crutcher
patent: 4566100 (1986-01-01), Mizuno et al.

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