Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2002-05-02
2003-03-25
Jeanpierre, Peguy (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S144000
Reexamination Certificate
active
06538589
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a digital &Dgr;&Sgr; modulator that permits the same accuracy as in the case of using a multibit quantizer and to a D/A converter using the digital &Dgr;&Sgr; modulator.
2. Description of the Prior Art
FIG. 11
is a block diagram showing the structure of a D/A converter which employs a prior art 1st-order digital &Dgr;&Sgr; modulator. In the figure, reference numeral
1
denotes an interpolation filter that increases the sampling rate of input digital data, and reference numeral
2
denotes a digital &Dgr;&Sgr; modulator for modulating and noise-shaping the input digital data with the increased sampling rate and for furnishing a 1-bit output. The digital &Dgr;&Sgr; modulator
2
consists of subtracters, integrators, a quantizer, and a delay element. Reference numeral
3
denotes an internal D/A converter for converting the noise-shaped digital data from the digital &Dgr;&Sgr; modulator
2
into analog data, and reference numeral
4
denotes a low-pass filter for eliminating out of band noise included in the analog data.
An over sampling &Dgr;&Sgr; conversion method is widely used as a conversion method for D/A converters which operate in a voice and audio band.
FIG. 11
shows the basic structure of the D/A converter which employs the 1st-order digital &Dgr;&Sgr; modulator.
In operation, the interpolation filter
1
increases the sampling rate of input digital data. The digital &Dgr;&Sgr; modulator
2
modulates the input digital data with the increased sampling rate and then noise-shapes the modulated digital data. The internal D/A converter
3
converts the noise-shaped digital data into analog data. The low-pass filter
4
then eliminates out of band noise included in the analog data from the internal D/A converter
3
and outputs the filtered analog data.
As previously mentioned, the digital &Dgr;&Sgr; modulator
2
consists of subtracters, integrators, a quantizer, and a delay element. Factors that determine the accuracy of the modulator include the order of the modulator and the number of bits per sample which the quantizer provides. The order of the modulator is decided according to how many integrators are inserted in the signal path of the modulator. For example, when the modulator has two integrators, the modulator is a second-order one.
FIG.
12
(
a
) is a block diagram showing the structure of a prior art 1-bit second-order digital &Dgr;&Sgr; modulator. In the figure, reference numeral
11
denotes a input unit, reference numeral
12
denotes a subtracter, reference numeral
13
denotes an integrator, reference numeral
14
denotes a subtracter, reference numeral
15
denotes an integrator, reference numeral
16
denotes a 1-bit quantizer, reference numeral
17
denotes an output unit, and reference numeral
18
denotes a delay element. FIG.
12
(
b
) is a block diagram showing the structure of a prior art multibit second-order digital &Dgr;&Sgr; modulator. In the figure, reference numeral
19
denotes a multibit quantizer. The other structure of the multibit second-order digital &Dgr;&Sgr; modulator is the same as that of the 1-bit second-order digital &Dgr;&Sgr; modulator as shown in FIG.
12
(
a
).
In general, the higher order the modulator has and the greater number of bits per sample the quantizer provides, the greater accuracy the digital &Dgr;&Sgr; modulator permits. A multibit digital &Dgr;&Sgr; modulator that employs a multibit quantizer permits greater accuracy if it has the same order as a 1-bit digital &Dgr;&Sgr; modulator. However, mismatch of unit element circuits included in the internal D/A converter
3
of
FIG. 11
are not avoided, and it is known that the accuracy is deteriorated as compared with its theoretical value.
FIG. 13
is a block diagram showing the structure of a D/A converter which employs a prior art multibit digital &Dgr;&Sgr; modulator. In the figure, reference numeral
20
denotes a dynamic element matching circuit (referred to as DEM from here on) disposed between a multibit second-order digital &Dgr;&Sgr; modulator and an internal D/A converter
3
.
In order to decrease the deterioration of the accuracy due to mismatch of unit element circuits included in the internal D/A converter
3
, it is indispensable to dispose the DEM
20
as a former stage located immediately before the internal D/A converter
3
. The greater number of bits the output of the multibit digital &Dgr;&Sgr; modulator has, the larger scale the DEM
20
has and therefore the structure of the DEM
20
becomes more complex. It is therefore desirable that the D/A converter includes a digital &Dgr;&Sgr; modulator that sends out a 1-bit digital output and that provides noise-shaping characteristics which are similar to those in the case of using a multibit quantizer.
A problem with a prior art digital &Dgr;&Sgr; modulator using a multibit quantizer that although it permits a high degree of accuracy, mismatch of unit element circuits included in an internal D/A converter
3
are not avoided and, when a DEM
20
is disposed as a former stage located immediately before the internal D/A converter
3
to decrease the accuracy deterioration due to the mismatch of unit element circuits included in the internal D/A converter
3
, the circuit scale of the DEM
20
increases and therefore the structure of the DEM
20
becomes complex.
SUMMARY OF THE INVENTION
The present invention is proposed to solve the above-mentioned problem, and it is therefore an object of the present invention to provide a digital &Dgr;&Sgr; modulator that permits accuracy similar to that provided by a prior art digital &Dgr;&Sgr; modulator using a multibit quantizer and that reduces its circuit scale, and a D/A converter using the digital &Dgr;&Sgr; modulator.
In accordance with an aspect of the present invention, there is provided a digital &Dgr;&Sgr; modulator comprising: a first-stage 1-bit &Dgr;&Sgr; modulator provided with an 1-bit (1 is an arbitrary natural number) quantizer, for modulating digital data; a correction logic for multiplying a quantization error caused in the 1-bit quantizer by a correction so that the quantization error caused in the 1-bit quantizer is eliminated at an output of the first-stage 1-bit &Dgr;&Sgr; modulator; and a next-stage m-bit &Dgr;&Sgr; modulator provided with an m-bit (m is an arbitrary natural number larger than 1) quantizer, for modulating and feeding the quantization error which is multiplied by the correction by the correction logic back to the first-stage 1-bit &Dgr;&Sgr; modulator. In general, when a prior art m-bit digital &Dgr;&Sgr; modulator is applied to a D/A converter, the greater number of bits per sample an m-bit quantizer included in the digital &Dgr;&Sgr; modulator provides, the more a DEM to be located immediately behind the digital &Dgr;&Sgr; modulator is complicated and the larger scale the DEM has. However, by using a small-scale DEM as compared with a DEM needed by a prior art m-bit digital &Dgr;&Sgr; modulator using an m-bit quantizer, the digital &Dgr;&Sgr; modulator according to this aspect of the present invention can permit accuracy similar to that provided by the prior art m-bit digital &Dgr;&Sgr; modulator, thereby reducing the circuit scale.
In accordance with another aspect of the present invention, the first-stage 1-bit &Dgr;&Sgr; modulator is a 1-bit &Dgr;&Sgr; modulator having a 1-bit quantizer. Since an output is sent out of the first-stage 1-bit &Dgr;&Sgr; modulator, a final output of the digital &Dgr;&Sgr; modulator is a 1-bit data stream and therefore no DEM needs to be used. Accordingly, the digital &Dgr;&Sgr; modulator with a simple structure permits accuracy similar to that provided by a prior art m-bit digital &Dgr;&Sgr; modulator using an m-bit quantizer, thereby reducing the circuit scale.
In accordance with a further aspect of the present invention, the next-stage m-bit &Dgr;&Sgr; modulator feeds its modulated output back to an input of the first-stage 1-bit &Dgr;&Sgr; modulator. The digital &Dgr;&Sgr; modulator according to the asp
Kumamoto Toshio
Morimoto Yasuo
Okuda Takashi
Burns Doane , Swecker, Mathis LLP
Jeanpierre Peguy
Mitsubishi Denki & Kabushiki Kaisha
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