Digital demodulator for a phase-modulated signal

Demodulators – Phase shift keying or quadrature amplitude demodulator

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329307, 375327, 375328, H04L 2722

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active

058182977

ABSTRACT:
The demodulator is for processing a signal having a carrier modulated by (0, .pi.) phase shifts and sampled at a rate that is at least twice the frequency of the carrier co. It comprises, in cascade: a first multiplier for squaring successive samples e(t), a phase locked loop adjusted to the frequency of the carrier, thereby performing programmable digital filtering; a divider for dividing the frequency by two, reconstituting the carrier from the output of the phase locked loop; a second multiplier receiving the sampled input signal and the output signal from the divider and an output lowpass digital filter. A phase adjustment circuit is placed upstream of one of the inputs of the second multiplier.

REFERENCES:
patent: 4667334 (1987-05-01), Collec et al.
patent: 5150070 (1992-09-01), Rinaldi et al.
patent: 5182760 (1993-01-01), Montgomery
International Conference on Communications, Including Supercomm Technical Sessions. Atlanta, Apr. 15-19, 1990, vol. 2 of 4, 15 Apr. 1990, Institute of Electrical and Electronics Engineers, pp. 365-369, XP000146095 Tomoki Ohsawa: "Wide Range and Short Time Pull-in Coherent Demodulation Method for PSK Signal--Ace-Demo--".

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