Digital demodulator

Demodulators – Phase shift keying or quadrature amplitude demodulator

Reissue Patent

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Details

C329S306000, C375S329000

Reissue Patent

active

RE038932

ABSTRACT:
A digital demodulator which demodulates information signals that have been phase-modulated using a method such as PSK (Phase Shift Keying). The adder46adds a compensation value held by the phase compensator45to phase difference data outputted from the comparator43.The subtractor47subtracts phase difference data delayed by the delaying circuit44by one information symbol period from the sum of the phase difference data and the compensation value from the adder46,thus performing delay detection. With this digital demodulator, an input signal can be received and demodulated even if its frequency is not an integral division of the frequency of a master clock signal, and an oscillator can be used even if its frequency is not an integral multiple of the frequency of an input signal to be demodulated.

REFERENCES:
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patent: 5097220 (1992-03-01), Shimakata et al.
patent: 5511097 (1996-04-01), Tsumura
patent: 6038267 (2000-03-01), Oura et al.
patent: 464 814 (1992-01-01), None
patent: 2-230845 (1990-09-01), None
patent: 5-167631 (1993-07-01), None
patent: 5-191465 (1993-07-01), None
patent: 6-14070 (1994-01-01), None
patent: 6-30063 (1994-02-01), None

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