Digital demodulator

Pulse or digital communications – Receivers – Angle modulation

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C375S340000, C375S326000, C375S376000

Reexamination Certificate

active

06813321

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a digital demodulator for a digital broadcasting receiver that receives BS digital broadcasting, and further in particular relates to a digital demodulator for a digital broadcasting receiver that receives digital modulated waves in which modulated waves as a result of a plurality of modulation systems with respectively different necessary C/N (the ratio of carrier power to noise power) values undergo time-base-multiplexing for transmission.
BACKGROUND ART
In the BS digital broadcasting system, when the digital modulated waves, for example, 8PSK modulated waves, QPSK modulated waves, and BPSK modulated waves all being the primary signals, which are transmitted in a plurality of modulation systems with different necessary C/N values, are combined every specific interval, and are added to the hierarchical transmission system in which transmission takes place repeatedly on a frame-by-frame basis, a system in which burst symbol signals enabling reception with a low C/N value are inserted is adopted. The burst symbol signals are signals having undergone BPSK modulation in the known PN codes.
Moreover, in such a hierarchical modulation system, the frame synchronization pattern as well as the superframe discrimination signals are also patterned in a predetermined fashion and have undergone BPSK modulation. In addition, in a digital broadcasting receiver, absolute phasing, which makes reception phases correspond to phases at the transmitting party, is implemented in a digital demodulator for the purpose of decoding or the like with a decoder of demodulation baseband signals. Therefore, in the hierarchical modulation system, frame synchronization signals, the later-described TMCC signals for transmission multiplexed configuration discrimination, and burst symbol signals undergo BPSK demodulation, and from the reception phases of the received frame synchronization pattern (the absolute phase reception, and the inverse phase reception), absolute phasing is performed.
However, at the time of integration of a digital demodulator, there was a problem that the required area of the digital demodulator is increased due to an absolute phasing circuit.
The purpose of the present invention is to provide a digital demodulator needing no absolute phasing circuit.
DISCLOSURE OF THE INVENTION
According to the present invention, the digital demodulator of a receiver for digital broadcasting which receives and transmits digital modulated waves created by time-base-multiplexing waves modulated by a plurality of modulation systems comprises known-pattern signal generating means for generating in synchronism with known-pattern signals in the received digital modulated waves the same known-pattern signal as a known-pattern BPSK signal in the received digital modulated waves, carrier-reproducing phase error detecting means, which comprises a phase error table having one reference phase as a convergence point between two reference phases of signal point positions of BPSK demodulation baseband signals, for sending out a phase error output based on a phase error between the phase obtained from the signal point position of the demodulation baseband signals and the phase convergence point, and a carrier-reproducing loop filter which is controlled for enablement based on the known-pattern signals outputted from the known-pattern signal generating means and smoothes the phase error outputs during an enabling period, wherein carrier reproduction is implemented by controlling the frequency of a reproduced carrier so that based on the output of the carrier-reproducing loop filter, the phase of the above described signal point position coincides with the phase convergence point.
In the digital demodulator according to the present invention, the same known-pattern signal as the known-pattern BPSK signal in the received digital modulated waves is generated in synchronism with the known-pattern BPSK signals in the received digital modulated waves from known-pattern signal generating means, the phase error output based on the phase error between the phase obtained from the signal point position of the demodulation baseband signals and the phase convergence point is detected from carrier-reproducing phase error detecting means comprising only the phase error table having one reference phase as the convergence point between the reference phases of the signal point positions of the BPSK demodulation baseband signal as the phase error table, for the purpose of phase error detection, and being enable-controlled based on the known-pattern BPSK signals outputted from the known-pattern signal generating means, the phase error outputs during the enabling period are smoothed by a carrier-reproducing loop filter, and carrier reproduction is implemented by controlling the frequency of the reproduced carrier so that based on the output of the carrier-reproducing loop filter, the phase of the above described signal point position coincides with the phase convergence point, and therefore since the phase point of the reception signal converges to the absolute phase, the reception signal undergoes absolute phasing and no absolute phasing circuit will be needed.
The digital demodulator according to the present invention goes well with only one phase error table, and for the period of such a known-pattern BPSK signal potential that will not enable the carrier-reproducing loop filter, for the period of TMCC, for the period of primary signal BPSK signal, for the period of QPSK signal, and for the period of 8PSK signal, a filter operation is halted, and therefore, the phases obtained from the signal point positions of the demodulation baseband signals for the period of such a known-pattern BPSK signal potential that will not enable the carrier-reproducing loop filter, for the period of TMCC, for the period of primary signal BPSK signal, for the period of QPSK signal, and for the period of 8PSK signal are compared with the reference phases in the phase error table so that the phase error output is sent out, but during this period the carrier-reproducing loop filter will be halting its operation, giving rise to no inconveniences.


REFERENCES:
patent: 4599732 (1986-07-01), LeFever
patent: 4748623 (1988-05-01), Fujimoto
patent: 5463627 (1995-10-01), Matsuoka et al.
patent: 6018556 (2000-01-01), Janesch et al.
patent: 6526107 (2003-02-01), Katoh et al.
patent: 6639951 (2003-10-01), Katoh et al.
patent: 55-006965 (1980-01-01), None
patent: 63-234759 (1988-09-01), None
patent: 09-321813 (1997-12-01), None
patent: 10-215291 (1998-08-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Digital demodulator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital demodulator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital demodulator will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3328366

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.