Pulse or digital communications – Repeaters – Testing
Patent
1991-07-25
1993-11-09
Kuntz, Curtis
Pulse or digital communications
Repeaters
Testing
375 83, 455214, 329346, 328133, H03D 322, H04L 2722
Patent
active
052609758
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
This invention is applicable to a circuit which demodulates data signals from phase modulated signals transmitted by phase modulating carriers with data signals. This invention is more particularly related to a digital demodulator which has an excellent bit error rate performance under thermal noises or fading, which can be reduced in power consumption, size and cost, and which does not need adjustment.
BACKGROUND TECHNOLOGY
There have been known a coherent detector and a differential detector as the detector to be used for demodulation of digital phase modulated signals. The coherent detector is known to achieve the highest performance theoretically, but in the transmission channels where high speed fading exists such as mobile communication system, a differential detector is often found more advantageous than the former.
FIG. 39 is a block diagram to show the basic structure of a coherent detector.
In the figure, phase modulated signals are inputted via an input 301 at a carrier recovery circuit 302 to recover the signals coherent to the carriers of the phase modulated signals. In a detector 303 in which phase modulated signals are inputted from the input 301 similarly, the phase modulated signals are detected by means of recovered carriers outputted from the carrier recovery circuit 302 and the detection output thereof is sent out from an output 304. Optimal coherent detection will be achieved if carriers are recovered at the circuit 302 without thermal noises or random FM noises which are caused by fading.
Most of the carrier recovery circuits currently in use are structured to remove mainly the effect of thermal noises, and although they can recover stable carriers under the conditions with many thermal noises, the phase of the recovered carriers cannot quite follow rapid changes such as occurring in random FM noises caused by fading to thereby degenerate the performance.
The differential detector, on the other hand, is inferior to the coherent detector in performance under thermal noises, but under fast fading which causes rapid phase changes, it shows better performance than the coherent detector.
FIG. 40 is a block diagram to show the basic structure of a differential detector.
In FIG. 40, phase modulated signals are inputted via an input 311 at a delay circuit to be delayed by an amount equivalent to one or two symbols of the data, and multiplied with a phase modulated signal which has been delayed by the detector 313 which receives signals from the input 311, so that detection output recovered from the phase difference therebetween is transmitted from an output 314.
The differential detector of this type is structured to detect input phase modulated signals by referring to the phase of the signal one or two symbols before, and does not require carrier recovery to thereby enable simplification of the circuit structure. However, it requires delay lines equivalent to one or two symbols of the data.
As it is not easy to manufacture delay lines which are high in precision and suitable to circuit integration, shift registers such as shown in FIG. 41 are usually utilized to delay phase modulated signals. In FIG. 41, the reference numeral 315 denotes a shift register using the output from a single frequency oscillator 316 as a clock and is equivalent to the delay circuit 312.
FIG. 42 shows in a block diagram a demodulator using a digital signal processing type detector.
In FIG. 42, phase modulated signals are inputted via an input 321 at multipliers 322.sub.1, 322.sub.2, and detected by signals having the frequency substantially similar to the carrier frequency (quasi-coherent detection). A single frequency oscillator 323 generates signals of the frequency substantially similar to the carrier frequency, and transmits the same to the multiplier 322.sub.1 as they are and to the multiplier 322.sub.2 via a .pi./2 shift circuit 324. The in-phase and quadrature signals or the outputs from the multipliers 322.sub.1 and 322.sub.2 are inputted at analog/digital converters (A/D) 326.sub.1 and 3
REFERENCES:
patent: 4754174 (1988-06-01), Matthies
patent: 5128626 (1992-07-01), Iwasaki
Shigeki Saito, Hiroshi Suzuki, "Fast Carrier-Tracking Coherent Detection with Dual-Mode Carrier Recovery Circuit for Digital Land Mobile Radio Transmission," IEEE Journal on Selected Areas in Communications, vol. 7, No. 1, Jan. 1989.
Hiroshi Suzuki, Yasushi Yamao and Hiroyuki Kikuchi, "A Single-Chip MSK Coherent Demodulator for Mobile Radio Transmission," IEEE, 0018-9545/85/1100-10157, 1986.
Gary J. Saulnier, William Rafferty, "DSP-Based Non Coherent Dual Detector Demodulator For Land Mobile Radio Channels," IEEE CH2314-Mar. 1986.
Bocure Tesfaldet
Kuntz Curtis
Nippon Telegraph and Telephone Corporation
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