Digital delay line apparatus

Details Digital delay line apparatus Digital delay line apparatus

1978-07-10

1980-01-01

Boudreau, Leo H.

Boots, shoes, and leggings

307232, 328155, H03K 500, G06F 300

Patent

active

041819756

ABSTRACT:
Apparatus is illustrated for delaying in increments of infinitesimally small electrical angles the data bits in a data stream using an addressable elastic buffer which is addressed by a phase lock loop used to compare the output data with a reference. The comparison can be as a result of a frame detection puslse or any other suitable characteristic of the data being delayed.

REFERENCES:
patent: 3723714 (1973-03-01), Jackson et al.
patent: 3870970 (1975-03-01), Chibana
patent: 3991322 (1976-11-01), Bush et al.
patent: 4019153 (1977-04-01), Cox, Jr. et al.
patent: 4025775 (1977-05-01), Beauvais et al.
patent: 4153896 (1979-05-01), White

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