Digital delay circuit and method

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

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Details

327284, 327279, H03K 514, H03K 519

Patent

active

057899690

ABSTRACT:
A digital delay circuit structure includes a digital calibration circuit and a digital delayed signal generator. The digital delay circuit is automatically calibrated when a calibrate signal goes active. Once the auto-calibration process is completed, the circuit switches back to a normal delay mode operation where the digital delay circuit remains until the next transition of the calibrate signal. A calibration control circuit generates a sample gate signal which initiates a feedback signal to the input terminal delay chain circuit that causes the delay chain output signal to oscillate. A calibration counter circuit counts the oscillations and couples this information to a count decoder circuit which in turn generates a signal to select one of a plurality of taps in the delay chain circuit. The digital delay circuit automatically compensates for delay variations caused by process extremes, temperature, and average voltage changes.

REFERENCES:
patent: 4458165 (1984-07-01), Jackson
patent: 4504749 (1985-03-01), Yoshida
patent: 5049766 (1991-09-01), Van Driest et al.
patent: 5329188 (1994-07-01), Sikkink et al.
patent: 5451894 (1995-09-01), Guo
patent: 5465076 (1995-11-01), Yamauchi et al.

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