Dynamic magnetic information storage or retrieval – General processing of a digital signal – In specific code or form
Patent
1997-02-19
2000-08-22
Psitos, Aristotelis M.
Dynamic magnetic information storage or retrieval
General processing of a digital signal
In specific code or form
360 46, 341 58, G11B 509
Patent
active
061081493
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to an apparatus for sending digital data corresponding to a partial response method, for example, a data recorder for recording/ reproducing digital data on/from a magnetic tape with a head.
BACKGROUND ART
A data recorder has been widely used as an external storing unit for computers and the like. As an example of the data recorder, a helical scan type data recorder that records digital data on a cassette tape as a magnetic tape with a rotating head is known. In an example of the data recorder, a magnetic recording/reproducing system of the data recorder is treated as a transmitting system corresponding to a partial response method. The recording system precodes record data. The reproducing system equalizes a signal reproduced from the head corresponding to the partial response method and identifies bits corresponding to a clock signal extracted from the signal reproduced from the head so as to reproduce data. In this method, high density data can be reproduced without errors.
FIG. 15 is a block diagram showing a recording/reproducing system of a data recorder corresponding to the partial response transmission method.
Eight-bit-word data is input. The input data has been pre-processed by an error-correction-code encoding process. In addition, a block synchronous signal has been added to the input data. The input data is supplied to an 8-to-9 converting circuit 101. The 8-to-9 converting circuit 11 converts the input data into nine-bit-word data. The resultant data is supplied as serial data to a pre-coding circuit 102. In this data recorder, the magnetic recording/reproducing system is treated as a transmitting system corresponding to a partial response (1, 0, -1) method that is known as class 4 (hereinafter, this method is referred to as PR4 method). The pre-coding circuit 102 pre-codes the input serial data into a code corresponding to the PR4 transmission method. The resultant code is the same as well known interleaved NRZI code. The pre-coded data is recorded on a magnetic tape 105 through a recording amplifier 103 and a rotating recording head 104.
The data recorded on the magnetic tape 105 is reproduced by a rotating reproducing head 106 as a reproduced data signal. The reproduced data signal is supplied to a partial response circuit 108 and a clock signal extracting circuit 109 through a reproducing amplifier 107. The reproducing amplifier 107 has a pre-filter and a cosine equalizer (not shown) that compensate the phase and frequency characteristic of the reproduced data signal so as that the frequency characteristic of the data signal reproduced from the rotating reproducing head 106 satisfies a Nyquist frequency condition. The clock signal extracting circuit 109 extracts a clock signal from the data signal reproduced from the reproducing amplifier 107. The extracted clock signal is supplied to a partial response circuit 108. The partial response circuit 108 equalizes the supplied reproduced data signal corresponding to the PR4 method, identifies bits of the equalized reproduced data signal corresponding to the clock signal supplied from the clock signal extracting circuit 109, and restores the reproduced data signal to serial data that has not been pre-coded. The restored serial data is supplied to an 8-to-9 reverse converting circuit 110. The 8-to-9 reverse converting circuit 110 converts nine-bit-word data into eight-bit-word data. Thus, the input data is restored.
In the above-described data recorder, a clock signal is extracted from the reproduced data signal. Bits are identified corresponding to the clock signal. In the clock signal extracting method, with the phased lock loop (PLL) method of which the reversing state of the polarity of the reproduced data signal is detected and the detected reversing state is used as a phase reference, a voltage control oscillator (VCO) is controlled so as to obtain a clock signal that synchronizes with the reversing state of the polarity of the reproduced data signal. FIG. 16 shows an example of the clock si
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patent: 4988999 (1991-01-01), Uehara et al.
patent: 5161171 (1992-11-01), Suzuki et al.
patent: 5198813 (1993-03-01), Isozaki
patent: 5644307 (1997-07-01), Fukuda
patent: 5699061 (1997-12-01), Shimpuku
Frommer William S.
Neal Regina Y.
Psitos Aristotelis M.
Sony Corporation
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