Digital data resynchronization device

Patent

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Details

179 15AF, H04J 306

Patent

active

041581083

ABSTRACT:
A digital data resynchronization device used as an interface circuit between the incoming junctions of a PCM switching center and the time division switch. It possesses a memory that contains one-bit words loaded at the rate of the incoming data and read at the rate of the local clock. As a means of avoiding conflict due to simultaneous read-and-write operations, two time slots in the local clock cycle are provided for write operations and one time slot for read operations.
Application: RCM switching.

REFERENCES:
patent: 3928726 (1975-12-01), Colton et al.
patent: 3928727 (1975-12-01), Roche
patent: 4086437 (1978-04-01), Henrion et al.

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