Digital data recovery

Details Digital data recovery Digital data recovery

2011-06-21

2011-06-21

Bocure, Tesfaldet (Department: 2611)

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

C375S340000

Reexamination Certificate

active

07965801

ABSTRACT:
Data recovery, as well as associated circuitry and system, is described. An input word stream having a word width of at least one word is obtained and a sliding window is applied to it to resolve phases. Scores for phases are determined at least in part by: subdividing the sliding window into sample portions; applying a homogeneity function to each of the sample portions to determine respective values therefor; and summing sets of the values respectively associated with the phases to provide the scores. A score is selected from the scores according to at least one criterion to select a phase from the phases. A portion of a delayed version of the input word stream is sampled by application of the sliding window thereto using the phase selected to output sampled bits.

REFERENCES:
patent: 7672416 (2010-03-01), Hadzic et al.
Xilinx, Inc., “A 3/4/5/6X Oversampling Circuit for 200 Mb/s to 1000 Mb/s Serial Interfaces,” Nov. 18, 2004, pp. 1-13, XAPP572 (v.1.0), available from Xilinx, inc., 2100 Logic Drive, San Jose, California 95124, USA.

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