Digital data processor with fault-tolerant peripheral interface

Details Digital data processor with fault-tolerant peripheral interface Digital data processor with fault-tolerant peripheral interface

1989-06-16

1990-11-27

Chan, Eddie P.

Boots, shoes, and leggings

371 82, 3642402, 364268, 3642683, 3642687, 3642689, G06F 1116, G06F 1300

Patent

active

049741446

ABSTRACT:
A fault-tolerant digital data processing system comprises a first input-output controller which communicates with at least one peripheral device over a peripheral device bus having first and second input/output buses, each carrying data, address, control, and timing signals from the input/output controller to the peripheral device. A device interface is coupled to the first and second input/output buses and to an associated peripheral device for transferring information between the buses and the associated peripheral device. In normal operation, the device interface applies duplicate information signals synchronously and simultaneously to the input/output buses for transfer to the input/output controller. The device interface also receives, in the absence of fault, duplicative information signal synchronously and simultaneously from the first and second input/output buses.

REFERENCES:
patent: 3548382 (1970-12-01), Lichty et al.
patent: 3688274 (1972-08-01), Cormier et al.
patent: 3820079 (1974-06-01), Bergh et al.
patent: 3879712 (1975-04-01), Edge et al.
patent: 3984814 (1976-10-01), Bailey, Jr. et al.
patent: 3991407 (1976-11-01), Jordan, Jr. et al.
patent: 4015246 (1977-03-01), Hopkins, Jr. et al.
patent: 4059736 (1977-11-01), Perucca et al.
patent: 4099234 (1978-07-01), Woods et al.
patent: 4245344 (1981-01-01), Richter
patent: 4365295 (1982-12-01), Katzman et al.
patent: 4428044 (1984-01-01), Livon
patent: 4453215 (1984-06-01), Reid
patent: 4484275 (1984-11-01), Katzman et al.
patent: 4486826 (1984-12-01), Wolff et al.
patent: 4805039 (1974-04-01), Stiffler
"Standard Specification for S-100 Bus Interface Devices," K. A. Elmquist et al, Computer, Jul. 1979, vol. 12, No. 7, pp. 28-52.
"Fault Tolerant Systems" and Error Detection, T. Anderson et al, Fault Tolerance Principles and Practice, Prentice-Hall, 1981, pp. 93-145.
"Multiprocessor Organization-A Survey," P. H. Enslow, Jr., Computing Surveys, vol. 9, No. 1, Mar. 1977, pp. 103-129.
"Pluribus-An Operational Fault-Tolerant Multiprocessor," D. Katsuki et al, Proceedings of the IEEE, V. 66, No. 10, Oct. 1978, pp. 1146-1159.
"Fault-Tolerant Copmputers-A Hardware Solution to Part Failures Totally Insulates . . . ," G. Hendrie, Electronics, Jan. 27, 1983, pp. 103-105.

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