Digital data packet switching module for allocating empty packet

Multiplex communications – Wide area network – Packet switching

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Details

34082589, H04L 1256

Patent

active

052491803

ABSTRACT:
A switching module comprises input buses (1--1 , . . . 1-n) and at least one output bus (2-ij), in which each input bus, for data packet transmission, is connected to the output bus by means of a crosspoint switch (4-i). Each crosspoint switch (4-ij) has a unique address and a request output (61) for sending out a request signal. The switching module further includes allocation means (3-j) which place empty packets having the unique address of a crosspoint switch (4-ij) onto the output bus (2-j). The allocation means (3-j) comprise recording means (105,201) for receiving the request signals and include a FIFO (107,206) for storing representatives of the unique crosspoint switch addresses that are derived from the request signals. The allocation means (3-j) further include a packet generator (103) for deriving addresses from the representations from the queue store (107,206) and allocating these addresses to the empty packets.

REFERENCES:
patent: 4754451 (1988-06-01), Eng et al.
patent: 4821258 (1989-04-01), Fraser
patent: 5042032 (1991-08-01), Dighe et al.
patent: 5140582 (1992-08-01), Tsuboi et al.

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