Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels
Reexamination Certificate
1998-06-29
2002-01-01
Chin, Wellington (Department: 2664)
Multiplex communications
Communication techniques for information carried in plural...
Combining or distributing information via time channels
C370S394000, C370S360000
Reexamination Certificate
active
06335940
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a digital data exchange device, in particular to a digital data exchange device for an Ethernet switching hub, in which the purpose of equal transmission of data packets is attained by using a polling method. Moreover, the use of a tire out mechanism prevents dead lock between input/output ports and the digital data exchange device caused by abnormal packets.
2. Description of the Related Art
In general, the switching hub is used in the arrangement of a starshaped local area network, and it connects individual computers to allow for the sharing of resources. The main purpose of the switching hub is to establish a data pathway between any two computers thereby allowing the computers to communicate with each other and initiate data transmission.
In a local area network, each computer typically corresponds to an output/input port of a switching hub. Each output/input port is allocated an address. In order for computer A to communicate with computer B, computer A must indicate the output/input port address of computer B to the switching hub. Then, via a digital data exchange device, the output/input port address of computer A is maintained on the output/input port of computer B, thereby establishing a data pathway. After the data path has been established, the output/input port of computer A will be accordingly stored in the output/input address of computes B, and computer B will only allow the data of computer A to access its output/input port; communication between computers A and B has thereby been established.
In the prior art, a digital data exchange device accepts requests for establishing data pathways and transmits data packets by a method of interruption. Namely, when computer A needs to communicate with the computer B, it sends a request to the output/input port of computer B. When computer B accepts this request, the port ID of computer A is stored on the output/input port of computer B, thus establishing a data pathway between computers A and B.
When distribution between the data flow of each output/input port is even, a request for establishing a data pathway is accepted by using a method of interruption. Therefore, the requirement of real time transmission is efficiently attained. However, current networks rarely exhibit an even distribution of data flow. For example, while a number of terminal computers may continuously communicate with a single network server, other computers may be simultaneously sending requests for establishing data pathways to that server. When a plurality of output/input ports {A
1
. . . An} concurrently send requests for establishing data paths to an output/input port {B}, an arbitrator utilized in a conventional digital data exchange device will determine the priority by which the data will be transmitted to its respective destinations.
This arbitrator, in the prior art, randomly selects which of the output/input ports {A
1
. . . An} can initiate communication with the output/input port {B}. In theory, if no other output/input ports {a
1
. . . an} send requests at the time when all the requests sent output/input ports {A
1
. . . An} have been processed by the arbitrator, the arbitrator will respond to the requests of the output/input ports in sequence to successfully complete the communications.
However, in a high capacity network, the above-mentioned output/input ports {a
1
. . . an} may inconsistently send their requests to the arbitrator prior to the arbitrator's completion of responding to the requests of output/input ports {A
1
. . . An}. As a result, certain requests from output/input ports {A
1
. . . An} and output/input ports {a
1
. . . an} will be overlooked and subsequently omitted by the arbitrator. A situation of stalled communication will arise, causing the functional efficiency of the network to decrease substantially.
If each output/input port request is equally accepted, the probability that a request sent by each output/input port will be processed will accordingly be even.
Furthermore, since digital data is transmitted packet by packet, there exists an inter_frame gap between the transmission of any two packets, during which each individual packet is differentiated. If this inter_frame gap of time can be used, a request sent by an output/input port can be efficiently interpreted without utilizing the interruption method.
Although a request from an output/input port is likely to be omitted if there is no interruption, this problem can be perfectly resolved by using a buffer memory to record each request.
SUMMARY OF THE INVENTION
In view of the above, the present invention provides an enhanced Digital Data Exchange Device. It has been accomplished through a succession of advanced study and research, with the intent of overcoming the drawbacks encountered in the prior art. The main features of the invention are described below.
The invention, consisting of a data exchange device, applies a polling method to the output/input ports, and thereby is able to equally transmit the various data packets.
In the invention, the digital data exchange device, used to dynamically and electrically connect a plurality of input ports to a output ports, comprises: a first multiplexer electrically connected to the plurality of input ports, for selecting an output port thereof to output the data, which includes the output port ID of the input port; a demultiplexer electrically connected to the first multiplexer and the plurality of output ports, for selecting the output port therefrom in response to the output port ID; and an address generator electrically connected to both the multiplexer and demultiplexer, for generating the port ID of the plurality of input ports in sequence, so that the first multiplexer can select the input port and transmit its ID to the output port by using the demultiplexer, thereby connecting the input port to the output port.
Each of the plurality of input ports mentioned above comprises: a command decoder for decoding input data; and a series-to-parallel format converter, electrically connected to the command decoder and the first multiplexer, used for converting the data of the input port from a serial format to a parallel format.
In addition, the output port comprises: a first-in/first-out memory unit electrically connected to the demultiplexer, in which the input port ID, outputted from the demultiplexer, is written into FIFO in response to an address writing operation, and from which the input port ID is read out in response to an address-reading operation; a second multiplexer electrically connected to the first-in/first-out memory unit and the input ports, for transmitting the data from the input port through the output port in response to the data reading operation of the first-in/first-out memory unit; and a read/write pointer controller electrically connected to the first-in/first-out memory unit, for recording the address reading and writing operations and updating its values in response to the reading and writing operations of the first-in/first-out memory unit.
The digital data exchange device described further comprises: a pulse generator electrically connected to the plurality of output ports, for sending back a signal identified by the input port when the input port ID is transmitted to the second multiplexer.
Since the number of the input ports is 33, and the number of the output ports is 34, the multiplexer should be 33 inputs to 1 output, and the demultiplexer should be 1 input to 34 outputs for data exchanges.
The read/write pointer controller mentioned above comprises: a writing counter, electrically connected to the first-in/first-out memory unit, for sequentially recording address writing operations; and a reading counter, electrically connected to the first-in/first-out memory unit, for sequentially recording address reading operations.
Furthermore, the address generator is a counter which periodically prod
Accton Technology Corporation
Chin Wellington
Pham Brenda H.
Sughrue Mion Zinn Macpeak & Seas, PLLC
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