Digital correction of nonlinearity errors of multibit...

Details Digital correction of nonlinearity errors of multibit... Digital correction of nonlinearity errors of multibit...

2011-06-28

2011-06-28

Nguyen, Linh V (Department: 2819)

Coded data generation or conversion

Converter calibration or testing

C341S118000, C341S143000, C341S144000

Reexamination Certificate

active

07969335

ABSTRACT:
Digital correction of multibit ADAC nonlinearities for error feedback DACs is provided. The integral nonlinearity (INL) error of the multibit ADAC is estimated (on line or off line) by a low-resolution calibration ADC (CADC) and stored in a random-access memory (RAM) table. The INL values are then used to compensate for the ADAC's distortion in the digital domain. When this compensation is combined with mismatch-shaping techniques such as DWA, the resolution requirement for CADC can be relaxed significantly. The implementation of the proposed correction circuit for error-feedback modulators is inherently simple, since the correction only needs a digital summation without any additional digital filtering.

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X. Wang, P. Kiss, U. Moon, J. Steensgaard and G.C. Temes, “Digital estimation and correction of DAC errors in multibit A˜ADCs,” Electronics Letters, pp. 414-415, No. 37, No. 7 (Mar. 29, 2001).

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