Digital control of phase locked loops

Details Digital control of phase locked loops Digital control of phase locked loops

1988-09-01

1990-07-24

Popek, Joseph A.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

328 27, 331 17, 331 25, 365 94, 365191, 36523003, H03L 708, H03M 170

Patent

active

049437860

ABSTRACT:
A control circuit, particularly for use in a phase-locked loop includes a read-only memory (ROM) having n address inputs divided into two groups, each group being addressed by first (A) and second (B) signals, and the memory device having words preprogrammed therein to provide an output having values (C) of a predetermined function of the first and second signals. In one embodiment the control circuit is employed in a phase-locked loop where one address group provides an analog version of the first signal to a voltage controlled oscillator, and application of the second signal to the second address group permits a step change in the output voltage to the VCO. In another embodiment, the first and second signals may comprise carrier signals and modulating signals in a phase-locked loop employed for frequency modulation.

REFERENCES:
patent: 4318188 (1982-03-01), Hoffmann
patent: 4367456 (1983-01-01), Munter
patent: 4594690 (1986-06-01), Meyers et al.
patent: 4692713 (1987-09-01), Cordwell et al.
Patent Abstracts of Japan, vol. 9, No. 4 (E-288)(1727), Jan. 10, 1985 Re. JP-A-59 15 334 (Toshiba K. K.) 01-09-1984 Abstract: figure.
IBM Technical Disclosure Bulletin, vol. 18, No. 8, Jan. 1976, pp. 2536-2537, New York, US; A. Dauby et al.: "Pulse Code Modulation Word Adder" pp. 2536, line 4-p. 2537, line 4; table.

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