Boots – shoes – and leggings
Patent
1993-03-19
1994-11-01
Bowler, Alyssa H.
Boots, shoes, and leggings
3642295, 3642408, 3642412, 3642415, 3642414, 3642429, 3642447, 3642476, 364259, 3642597, 3642599, 3642632, 364DIG1, 364DIG2, 395725, 395650, 395275, 395550, G06F 930, G06F 946, G06F 1324, G06F 1120
Patent
active
053613929
ABSTRACT:
A digital computing system having a low power mode of operation includes a mechanism for communicating, prior to entering the low power mode, information determinative of which events shall be capable of causing the termination of the low power mode. An integrated circuit microcomputer enters a low power mode in response to executing an LPSTOP instruction. Only reset events and those interrupt events having a priority level sufficiently high to pass an interrupt mask are capable of causing the termination of the low power mode. The LPSTOP instruction causes immediate data to be loaded into a status register, resetting the interrupt mask bits. The interrupt mask is then written, by means of a special bus cycle, into an interrupt mask register in a sub-system within the microcomputer. This subsystem then shuts down the clock signals to the remainder of the microcomputer, leaving only this sub-system active. The active sub-system performs a comparison of the priority levels of received interrupt requests to the interrupt mask during the low power mode. Only if the priority level of an interrupt is sufficiently high are the clock signals resumed, thus terminating the low power mode.
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Burgess Bradley G.
Dunn John P.
Fourcroy Antone L.
McDermott Mark W.
Bowler Alyssa H.
King Robert L.
Meyer Jonathan P.
Motorola Inc.
Pan Daniel H.
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