Digital computing system having auto-incrementing memory

Details Digital computing system having auto-incrementing memory Digital computing system having auto-incrementing memory

1979-03-12

1981-08-25

Springborn, Harvey E.

Boots, shoes, and leggings

G06F 1300, G06F 1306

Patent

active

042863201

ABSTRACT:
A digital computing system having an auto-incrementing memory subsystem includes one or more separate memories. Each memory in the memory subsystem has its own address counter which is automatically incremented to the next sequential address after each memory readout. In the case of plural memories, a page select enables memory readout only when a page designation portion of the address matches a unique page number associated with the memory. An automatic memory refresh is provided by a refresh address counter along with a refresh address incrementer in the case that a memory is a dynamic RAM. These features enable improved performance in the digital computing system by reducing the required CPU overhead for memory subsystem control.

REFERENCES:
patent: 3691531 (1972-09-01), Saltini et al.
patent: 3702988 (1972-11-01), Haney et al.
patent: 3866180 (1975-02-01), Willette
patent: 3972025 (1976-07-01), Taddei
patent: 3972028 (1976-07-01), Weber et al.
patent: 4086626 (1978-04-01), Chung

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