Digital computer system having circuit for regulation of I/O com

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3642383, 3642715, 364DIG1, G06F 1314

Patent

active

050653130

ABSTRACT:
A digital computer system has an I/O command recovery circuit for providing suitable I/O recovery time for any one of a plurality of associated peripheral devices. The circuit, transparent to both software and system execution speed, enables the digital computer system to efficiently run certain software application programs that interface with the peripheral devices and provide timing loops for setting the command recovery time. Those certain software application programs, designed for earlier and slower computer systems, run the timing loops in too short a time to provide the maximum I/O recovery time. The addition of the I/O command recovery circuit provides selectable and suitable recovery times for each of the associated peripheral devices, including no recovery time for those devices not requiring it.

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patent: 4400773 (1983-08-01), Brown et al.
patent: 4638452 (1987-01-01), Schultz et al.
patent: 4675807 (1987-06-01), Gourneau et al.
patent: 4772888 (1988-09-01), Kimura

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