Digital computation integrated circuit for convolution type comp

Details Digital computation integrated circuit for convolution type comp Digital computation integrated circuit for convolution type comp

1988-12-07

1991-04-02

Shaw, Dale M.

Boots, shoes, and leggings

G06F 15336

Patent

active

050051490

ABSTRACT:
An integrated circuit for convolution type computations of the form ##EQU1## where j-i+k, and j and k are integers and i is a natural integer, C.sub.i being complex coefficients and X.sub.j being complex or real input data, for use in digital signal processing. A plurality of cells are connected in a sequence, all receiving simultaneously the input data; the complex coefficients are subsequently sent on a propagation bus to a cell first in the sequence of connected cells. Each cell includes a multiplier, and an adder accumulator, and a transfer circuit for transferring received coefficients to the next cell. In each cell, sequentially received coefficients are first used for computation and then transferred by the transfer circuit with a suitable delay. A logic device controls the time distribution and repetition of the real and imaginary parts of the input data. The cells alternately perform partial computations on the real and imaginary parts; the results, with a corresponding validations signal, are pooled by a pooling circuit and applied to a common results-framing and rounding circuit.

REFERENCES:
patent: 4489393 (1984-12-01), Kawahara et al.
patent: 4750144 (1988-06-01), Wilcox
patent: 4791590 (1988-12-01), Ku et al.
patent: 4833635 (1989-05-01), McCanny et al.
Electronics, vol. 52, No. 26, Dec. 1979, pp. 109-115, New York, U.S.; L. Schirm IV "Packing a signal processor onto a single digital board": FIG. 5; p. 112, lignes 16-28.
IEE Proceedings Section A-I, vol. 130, No. 5, part F, Aug. 1983, pp. 409-416, Old Woking, Surrey, GB; C.-S. Yeh et al.: "Parallel architectures for computing cyclic convolutions".
Proceeding of the I.E.E.-F, vol. 127 No. 2, Apr. 1980, pp. 99-106; S. S. Magar et al.: "Microprogrammable arithmetic element and its applicaitons to digital signal processing".

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