Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
1998-08-21
2002-05-21
Pham, Chi (Department: 2631)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
C375S316000, C375S350000, C341S157000
Reexamination Certificate
active
06393070
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a digital communication device as claimed in the preamble of claim 1. Such a digital communication device can be a cellular or cordless phone, a pager, or any other wireless communication device.
The present invention further relates to a mixer for use in such a communication device.
A digital communication device of the above kind is known from the Philips Data Handbook IC17, “Semiconductors for Wireless Communications”, pp. 6-291 to 6-293, 6-303, and 6-305, Philips Semiconductors, 1997. On page 6-305, a block diagram of a receiver is shown comprised of IC types SA1620, a receiver front-end and SA1638, an intermediate frequency I/Q transceiver, and further receiver circuitry external to these ICs such as a duplexer, a frequency synthesizer, local oscillators, and filters. This data sheet was first published on Jun. 12, 1996. The known digital communication device can be a FD/TDMA (Frequency Division/Time Division Multiple Access) GSM (Global System for Mobile Communications) transceiver, or any other suitable dual conversion receiver or transceiver. A low noise amplifier amplifies a received radio frequency signal. An output signal of the low noise amplifier is fed to a first, radio frequency, mixing stage via a bandpass filter. An output signal of the bandpass filter is filtered in a second bandpass filter, in the known device a SAW (Surface Acoustic Wave) filter operating at a relatively high intermediate frequency, for selecting a desired channel. The filtered first intermediate frequency signal is fed to analog and digital conversion means for converting the first intermediate frequency signal to base band samples of a desired base band signal comprised in the radio frequency signal. In the known communication device the analog and digital conversion means comprises an intermediate frequency amplifier of which an output is coupled to a pair of quadrature mixers, a pair of lowpass filters coupled to the mixers, and analog-to-digital converters (not shown in detail, but indicated with “to GSM baseband”). A severe drawback of this dual conversion architecture is that the channel selection filter has to be implemented using external passive components. Apart from the known communication device as described above, dual conversion receiver structures are known in which the first mixer stage mixes down the radio frequency signal to a relatively low intermediate frequency signal which is directly digitized by means of a bandpass sigma delta analog-to-digital converter. The analog-to-digital converter passes the sampled first intermediate frequency signal to a DSP (Digital Signal Processor) which performs a digital mixing down of the samples to a desired base band signal comprised in the received radio frequency signal. As compared to the architecture described in said Philips handbook, the latter architecture has the drawback that a more sophisticated and thus more complex and more power consuming analog-to-digital converter is needed. Furthermore, because the DSP has to process higher frequency signal, increased power is consumed. In modern communication devices it is highly desired to consume as few power as possible so that longer standby and useful operating times are obtained. So, increased power consumption also is a serious drawback.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a digital communication device not having the above drawbacks, i.e., a device with a reduced number of components external to ICs and with reduced power consumption.
To this end the digital communication device is characterised in that the analog and digital conversion means comprises a controllable inverter stage for multiplying the first intermediate frequency signal with a square wave, and a bit stream analog-to-digital converter coupled to an output of the controllable inverter stage. Herewith, mixing and sampling is performed as a combined operation so that advantageously the complexity and thus the cost of the analog circuitry is greatly reduced.
An embodiment is claimed in claim 2. Advantageously, the lowpass filtering characteristic of the filtering part of the sigma delta analog-to-digital converter is used for the required filtering. Advantageously, so as to further reduce the complexity of the analog circuitry, the mixing and sampling is done as claimed in claim 5. In the embodiments claimed in claim 4 as referring back to claim 3, the full advantages of the mixer/analog-to-digital converter are achieved, namely implied image rejection of unwanted signals and no feed-through of local oscillator signals.
REFERENCES:
patent: 5305004 (1994-04-01), Fattaruso
patent: 5410498 (1995-04-01), Staver
Philips Data Handbook IC17, “Semiconductors for Wireless Communications” pp. 6-291 to 6-293, 6-303, 6-305. By Philips Semiconductor, 1997.
Koninklijke Philips Electronics , N.V.
Mak Theo
Pham Chi
Phu Phuong
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