Digital clock recovery circuit

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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Details

331 8, 331 11, 331 27, H03B 304

Patent

active

041514858

ABSTRACT:
A digital clock signal tracks a pulse stream data signal by developing two phase-lock restorative voltages through a phase-locked loop circuit which control the loop VCO that generates the clock signal, one voltage, designated as fine, being developed through a digital up/down counter and a digital/analog converter whenever the phase difference between the two signals exceeds a first threshold, and the second voltage, designated as coarse being generated by combining with the fine voltage a voltage to reduce or increase its value before application to the VCO so that the altered control voltage rapidly restores phase-lock whenever the phase difference exceeds a second threshold greater than that of the first.

REFERENCES:
patent: 3825855 (1974-07-01), Basset et al.
patent: 3882412 (1975-05-01), Apple, Jr.
patent: 4027274 (1977-05-01), Fukui et al.
patent: 4107623 (1978-08-01), Graf et al.

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