Digital circuitry apparatus

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor

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371 1, G04F 1000

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active

054382599

ABSTRACT:
In a digital circuitry apparatus in which clock distribution can be performed with high accuracy even in the case where variations in delay time are caused by variations in the apparatus operating condition, programmed input data set to delay circuits are corrected by a circuit portion for measuring the delay time of a phase shifting adjustment delay circuit with respect to variations in delay time caused by variations in the apparatus operating condition, a first arithmetic operation circuit for calculating the rate of variation on the basis of measured values, and a second arithmetic operation circuit for calculating the quantity of variation on the basis of the rate of variation.

REFERENCES:
patent: 4980586 (1990-12-01), Sullivan et al.
Johnson et al., "A Variable Delay Line PLL for CPU-Coprocessor Synchronization", IEEE Journal of Solid-State Circuits, V. 23, No. 5, pp. 1218-1223, 1992.
Chapman, J., "High-Performance CMOS-Based VLSI Testers: Timing Control and Compensation", International Test Conference Proc., IEEE 1993, pp. 59-67.
Branson et al., "Integrated Pin Electronics for a VLSI Test System", International Test Conference Proc., IEEE 1988, pp. 23-27.

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