Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform
Reexamination Certificate
2007-09-25
2007-09-25
Lam, Tuan T (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Having specific delay in producing output waveform
C327S281000, C327S158000, C327S161000
Reexamination Certificate
active
10520429
ABSTRACT:
A digital circuit according to the present invention includes a pulse delay circuit where a driving current of an inverter is variable, for causing timing of a clock signal to be variable; and the pulse delay circuit has a stabilizing circuit for an amount of a pulse delay by a delay synchronizing loop, and a generating circuit for a pulse delay amount setting voltage with nonlinear characteristics. The present invention makes it possible to realize a timing delay circuit with high resolution, which is not influenced by an operating environment and requires only a small area for the circuit.
REFERENCES:
patent: 4259903 (1981-04-01), Arendt et al.
patent: 4899071 (1990-02-01), Morales
patent: 4922141 (1990-05-01), Lofgren et al.
patent: 5146121 (1992-09-01), Searles et al.
patent: 5216302 (1993-06-01), Tanizawa
patent: 5614855 (1997-03-01), Lee et al.
patent: 5822255 (1998-10-01), Uchida
patent: 5926046 (1999-07-01), Uchida
patent: 5990730 (1999-11-01), Shinozaki
patent: 6081146 (2000-06-01), Shiochi et al.
patent: 6084802 (2000-07-01), Shinozaki
patent: 6229364 (2001-05-01), Dortu et al.
patent: 6741107 (2004-05-01), Borkar et al.
patent: 7027548 (2006-04-01), Palusa et al.
patent: 2002/0140471 (2002-10-01), Fiscus
patent: 2002/0141527 (2002-10-01), Song
patent: U-03-098534 (1991-10-01), None
patent: A-05-183337 (1993-07-01), None
patent: A-09-321614 (1997-12-01), None
patent: A-09-512966 (1997-12-01), None
patent: A-10-055668 (1998-02-01), None
patent: A-10-079663 (1998-03-01), None
patent: A-2002-163034 (2002-06-01), None
Higuchi Tetsuya
Kasai Yuji
Takahashi Eiichi
Lam Tuan T
National Institute of Advanced Industrial Science and Technology
Oliff & Berridg,e PLC
LandOfFree
Digital circuit having delay circuit for adjustment of clock... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Digital circuit having delay circuit for adjustment of clock..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital circuit having delay circuit for adjustment of clock... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3732461