Digital circuit for the level alignment of an analog signal

Details Digital circuit for the level alignment of an analog signal Digital circuit for the level alignment of an analog signal

1983-04-01

1985-12-31

Chin, Tommy P.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

H04N 518

Patent

active

045624712

ABSTRACT:
A digital processing circuit for aligning the d.c. component of an analog television signal. The analog signal is connected to one input of a differential amplifier. The output of the amplifier is connected to an analog to digital converter. The output of this converter forms the output of the entire circuit. A correction loop including an error detection circuit and a digital to analog converter is connected from this output to the second input of the differential amplifier. The error detection circuit includes an averaging circuit, a comparator, an adder and a memory register.

REFERENCES:
patent: 4124869 (1978-11-01), Heitmann
patent: 4473846 (1984-09-01), Mackereth
Smpte Journal, vol. 87, No. 1, Janvier 1978 New York (US), Y. Eto et al.

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