Digital calibration type analog-to-digital converter and...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S159000

Reexamination Certificate

active

08004445

ABSTRACT:
In a wireless chip receiving the multi-rate data according to the related art, power consumption and a circuit area of an analog-to-digital converter become large. In a digital calibration type analog-to-digital converter including both a reference analog-to-digital conversion unit and a main analog-to-digital conversion unit, when processing the high-sample rate wireless receive signal, both the reference analog-to-digital conversion unit and the main analog-to-digital conversion unit are operated to configure a general digital calibration type analog-to-digital converter, and when processing a low-sample rate wireless receive signal, analog-to-digital conversion is performed by using the reference analog-to-digital conversion unit and operations of the main analog-to-digital conversion unit or the like are stopped to remarkably reduce power consumption.

REFERENCES:
patent: 6674379 (2004-01-01), Li et al.
patent: 06-291658 (1994-10-01), None
A. N. Karanicolas et al., “A 15-b 1-Msample/s Digitally Self-Calibrated Pipeline ADC,” IEEE Journal of Solid-State Circuits, Vo. 28, No. 12, pp. 1207-1215 (1993).
Y. S. Shu et al., “A 15b-Linear, 20MS/s, 1.5b/Stage Pipelined ADC” Digitally Calibrated with Signal-Dependent Dithering, 2006 Symposium on VLSI Circuits Digest of Technical Papers (2006).
Y. Chiu et al., “Least Mean Square Adaptive Digital Background Calibration of Pipelined Analog-to-Digital Converters,” IEEE Transactions on Circuits and Systems—I: Regular Papers, vol. 51, No. 1, pp. 38-46 (2004).
Takashi Ohshima et al., “Fast Digital Background Calibration for Pipelined A/D Converters,” The Institute of Electronics, Information and Communication Engineers, IEICE Technical Report, VLD 2006-138 (2007).

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