Digital bus data retention

Details Digital bus data retention Digital bus data retention

1993-08-02

1996-04-23

Harvey, Jack B.

H01J 1300

Patent

active

055111700

ABSTRACT:
A digital bus is driven to the logic state of a data input signal upon activating a data enable signal. A bus keeper enable signal activates a buffer having its input and output connected to the digital bus. The data is thus buffered and driven back onto the digital bus during the active state of the bus keeper enable signal in order to retain the logic state after the data enable signal deactivates. The bus keeper enable signal remains active until a subsequent data enable signal becomes active thereby retaining the data on the bus potentially indefinitely.

REFERENCES:
patent: 4298982 (1981-11-01), Auerbach
patent: 4320452 (1982-03-01), Kempf et al.
patent: 4774422 (1988-09-01), Donaldson et al.
patent: 4801813 (1989-01-01), Kersenbrock
patent: 5007012 (1991-04-01), Dujari
patent: 5230067 (1993-07-01), Buch

Affiliated with

Also associated with

Rating

Digital bus data retention does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital bus data retention, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital bus data retention will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2316085