Optical: systems and elements – Deflection using a moving element – Using a periodically moving element
Utility Patent
1997-03-25
2001-01-02
Negash, Kinfe-Michael (Department: 2733)
Optical: systems and elements
Deflection using a moving element
Using a periodically moving element
C359S199200, C372S038060
Utility Patent
active
06169618
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a digital automatic power controller for automatically controlling an output light intensity of an optical communication system light source and, more particularly, to a digital automatic power controller for efficiently controlling an output level through reduction of a pull-in time.
2. Description of the Related Art
Common optical communication systems for conducting data communication through transmission of light signals by means of optical fibers are provided with a digital automatic power controller (digital APC) for maintaining a constant output light intensity of a light source. In an optical communication system, it is a common practice to use a laser diode as the light source. A digital automatic power controller monitors an output light of the laser diode (the light source) by means of a photo-diode and feeds back the same to control the laser diode such that the output light maintains a constant light intensity.
FIG. 3
shows structure of a conventional digital automatic power controller. With reference to
FIG. 3
, a laser diode
180
functioning as a light source has an output light intensity of its light output signal (LO) controlled by a digital automatic power controller
100
. The conventional digital automatic power controller
100
shown in
FIG. 3
includes a photo-diode
110
, an amplifier
120
, a sample hold circuit
130
, a comparator
140
, a counter circuit
150
, a D/A conversion circuit
160
and an LD (laser diode) drive control circuit
170
.
The photo-diode
110
receives the light output signal (LO) of the laser diode
180
as a light input signal (LI) and photoelectrically converts the LI signal to output a photoelectric signal (IS). The amplifier
120
receives and amplifies the photoelectric signal (IS) output from the photo-diode
110
to supply an amplification signal (AS) to the sample hold circuit
130
. The sample hold circuit
130
samples and holds the amplification signal (AS) output from the amplifier
120
to generate and supply a sample hold signal (SH) to the comparator
140
. The comparator
140
compares the sample hold signal (SH) output from the sample hold circuit
130
with two reference voltages (R
2
) and (R
3
) to output count control signals (C
2
) and (C
3
) corresponding to the comparison results. The counter circuit
150
counts down or counts up in response to the count control signals (C
2
) and (C
3
) output from the comparator
140
to output a count value (N). The D/A conversion circuit
160
receives the count value (N) output from the counter circuit
150
, converts the digital count value (N) into an analog signal (AN) and supplies the analog signal to the LD drive control circuit
170
. The LD drive control circuit
170
generates an LD (laser diode) drive signal (DS) for driving the laser diode
180
in synchronization with a data signal (D) applied through a predetermined data input terminal, controls the level of the LD drive signal (DS) based on the analog signal (AN) output from the D/A conversion circuit
160
, and supplies thus controlled DS to the laser diode
180
.
Here, further detailed description will be made of operation of the comparator
140
and the counter
150
.
Being supplied with two reference voltages (R
2
) and (R
3
) ((R
2
)>(R
3
)) which are set with a level of a sample hold signal (SH) corresponding to a desirable output light intensity of the laser diode
180
therebetween, the comparator
140
compares a level of an applied sample hold signal (SH) with the reference voltages (R
2
) and (R
3
). Then, the comparator sets levels of two count control signals (C
2
) and (C
3
) to be supplied to the counter circuit
150
according to the comparison results. More specifically, when the level of the sample hold signal (SH) is higher than the reference voltage (R
2
), for example, the comparator sets the count control signal (C
2
) to have a high level. In addition, when the level of the SH is lower than the reference voltage (R
3
), the comparator sets the count control signal (C
3
) to have a high level. In other words, when the sample hold signal (SH) level is higher than the reference voltage (R
2
), only the count control signal (C
2
) attains a high level, when the signal level is between the reference voltage (R
2
) and the reference voltage (R
3
), both the count control signals (C
2
) and (C
3
) attain a low level, and when the signal level is lower than the reference voltage (R
3
), only the count control signal (C
3
) attains a high level.
The counter circuit
150
counts a count value (N) down bit by bit when the count control signal (C
2
) is at a high level out of the count control signals (C
2
) and (C
3
) received from the comparator
140
. When the count control signal (C
3
) is at a high level, the circuit
150
counts a count value (N) up bit by bit. When both the count control signals (C
2
) and (C
3
) are at a low level, the circuit conducts no counting operation.
An output light intensity of a light output signal (LO) of the laser diode
180
is thus controlled by an LD drive signal (DS) output from the LD drive circuit
170
of the digital automatic power controller
100
. A level of a sample hold signal (SH) corresponding to the light output signal (LO) of the laser diode
180
is controlled to be constant between the reference voltages (R
2
) and (R
3
). As a result, the output light intensity of the light output signal (LO) of the laser diode
180
will be controlled to be within a predetermined range.
Operation of the conventional digital automatic power controller will be described taking, as an example, a case where an output light intensity of a light output signal is higher than a predetermined value.
FIG. 4
is a time chart showing operation waveforms of the respective parts of the conventional digital automatic power controller
100
shown in FIG.
3
. Illustrated in the figure are a data signal (D), a light output signal (LO) of the laser diode
180
synchronized with the data signal (D), a photoelectric signal (IS) based on the light output signal (LO), a sample hold signal (SH) of the photoelectric signal (IS) and a count control signal (C
2
). Broken lines R
2
and R
3
indicated at the photoelectric signal (IS) and the sample hold signal (SH) denote levels of the reference voltages (R
2
) and (R
3
), respectively.
It is shown in
FIG. 4
that at an initial stage, the level of the sample hold signal (SH) is higher than the reference voltage (R
2
). The count control signal (C
2
) therefore attains a high level, so that the count value (N) of the counter circuit
150
is counted down. The LD drive circuit
170
responsively outputs an LD drive signal corresponding to the amount of the reduction of the count value (N) to decrease the output light intensity of the light output signal (LO) of the laser diode
180
. Until the level of the sample hold signal (SH) lowers to have a voltage between the reference voltages (R
2
) and (R
3
), the count control signal (C
2
) will be further maintained at a high level, so that the counter circuit
150
will continue counting down the count value (N) to keep decreasing the output light intensity of the light output signal (LO) of the laser diode
180
.
When the level of the sample hold signal (SH) reaches a value between the reference voltages (R
2
) and (R
3
), the count control signal (C
2
) attains a low level, so that the counter circuit
150
stops updating the count value (N). The LD drive circuit
170
responsively controls an LD drive signal to maintain a constant output light intensity of the light output signal (LO) of the laser diode
180
.
Contrary to the above-described case, when the output light intensity of the light output signal (LO) is lower than a predetermined value corresponding to the reference voltage (R
3
), the count control signal (C
3
) attains a high level, so that the count value (N) of the counter circuit
150
is counted up. The LD drive circuit
170
responsively outputs an LD drive signal (DS) t
Foley & Lardner
NEC Corporation
Negash Kinfe-Michael
LandOfFree
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