Digital audio frame and block synchonization

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

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327156, H03L 706

Patent

active

058595490

ABSTRACT:
A digital audio frame and block synchronization signal is generated from a reference clock having a nominal 50% duty cycle except that one out of every N cycles has a different duty cycle, where N corresponds to a block span of ancillary data within the frame samples of the digital audio. A phase locked loop includes a loop counter that provides a sample clock synchronized with the reference clock. A block counter subdivides the sample clock by N to produce a block clock. A logic circuit has the reference clock and a current count from the loop counter as inputs, and detects when the Nth non-50% duty cycle occurs to generate a reset signal. The reset signal is used to reset the block counter so that the block clock is synchronized with the reference clock.

REFERENCES:
patent: 5012198 (1991-04-01), Okada et al.
patent: 5170135 (1992-12-01), Ito et al.
patent: 5455840 (1995-10-01), Nakauchi et al.
patent: 5694089 (1997-12-01), Adachi et al.

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