Boots – shoes – and leggings
Patent
1984-06-11
1987-06-23
Malzahn, David H.
Boots, shoes, and leggings
G06F 752
Patent
active
046758372
ABSTRACT:
A digital arithmetic unit useful in data processing digital circuits comprises a plurality of stages each having two half-adders combined into a full adder and a carry logic element. An objective is to shorten the processing time for the addition and subtraction of binary numbers. For this purpose, the stages are divided into at least two groups and two separate carry paths are provided within each group. One of the carry paths is only switched on by means of selection logic elements. The activation occurs sequentially in group-wise fashion after simultaneous carry runs in all carry paths. The advantage particularly consists of the chronological coincidence of the carry runs in all groups.
REFERENCES:
patent: 3100835 (1963-08-01), Bedrij
patent: 3316393 (1967-04-01), Ruthazer
patent: 4139894 (1979-02-01), Reitsma
patent: 4525797 (1985-06-01), Holden
patent: 4573137 (1986-02-01), Ohhashi
K. Reiss, H. Leidl and W. Spichall, "Integrierte Digitalbausteine", Verlag Siemens Aktiengesellschaft, Berlin and Munich, 1970, pp. 389-394.
"Microprocessors/Microcomputers" by D. D. Givone and R. P. Roeser, McGraw-Hill Book Company, New York, 1980, pp. 166-172.
Noll Tobias
Rainer Alois
Ulbrich Walter
Malzahn David H.
Siemens Aktiengesellschaft
LandOfFree
Digital arithmetic unit having shortened processing time and a s does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Digital arithmetic unit having shortened processing time and a s, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital arithmetic unit having shortened processing time and a s will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-726287