Digital application of protective soldermask to printed...

Printing – Processes

Reexamination Certificate

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C347S100000, C347S102000

Reexamination Certificate

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07451699

ABSTRACT:
A method and apparatus for applying ink, according to a soldermask pattern, to a printed circuit board having elevated pads defining pad edges, the method including flooding the printed circuit board with ink such that the ink advances to the pad edges and is stopped thereby and thereat, without climbing onto the elevated pads.

REFERENCES:
patent: 4572764 (1986-02-01), Fan
patent: 4572925 (1986-02-01), Scarlett
patent: 5587730 (1996-12-01), Karz
patent: 5793392 (1998-08-01), Tschida
patent: 5965944 (1999-10-01), Frankoski et al.
patent: 5984455 (1999-11-01), Anderson
patent: 6030072 (2000-02-01), Silverbrook
patent: 6849308 (2005-02-01), Speakman et al.
patent: 2002/0076919 (2002-06-01), Peters et al.
patent: 198 42 379 (2000-05-01), None
patent: 0 440 027 (1991-08-01), None
patent: 1 163 552 (2003-08-01), None
patent: 01-255294 (1989-10-01), None
patent: 01 295489 (1989-11-01), None
patent: 07106740 (1995-04-01), None
patent: 08288621 (1996-11-01), None
patent: 09018115 (1997-01-01), None
patent: 09283893 (1997-10-01), None
patent: 2001249356 (2001-09-01), None
patent: WO 01/11426 (2001-02-01), None
patent: WO 02/01929 (2002-01-01), None
Machine translation of JP 07106470 to Mizuguchi from Japanese Patent Office website, Apr. 1995.
Machine translation of JP 08288621 to Yumoto from Japanese Patent Office website, Nov. 1996.
“Solder Mask” definition from Wikipedia, http://en.wikipedia.org/wiki/Solder—mask, printed on Jan. 2008.
WO 01/11426 takes the place of EP 1 163 552 (art .158 of the EPC).
Patent Abstracts of Japan of JP 01-255294 dated Oct. 12, 1989.

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