Digital apparatus approximating multiplication of analog signal

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324 78D, 324 79D, 328134, 328138, 364754, G06F 1534, G06F 752

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041819675

ABSTRACT:
A method and an apparatus are disclosed which employ digital techniques to approximate a multiplication of an analog signal by a sine wave of an appropriate frequency for detecting the analog signal. The analog signal is converted to a digital representation which includes a binary sign bit and a plurality of binary magnitude bits. The sign bit of the digital representation is selectively complemented by an inverting logic gate which operates under the control of a square wave having the appropriate frequency of the sine wave which is being approximated. The selective complementation of the sign bit of the digital representation functions to multiply the digital representation by +1 or -1 as determined by the status of the square wave signal. The resulting digital representation is latched at periodic intervals for further processing of the detected signal which results from the quasi digital multiplication.

REFERENCES:
patent: 3636446 (1972-01-01), Genter et al.
patent: 3803390 (1974-04-01), Schaepman
patent: 3820021 (1974-06-01), Clarisse
patent: 3912916 (1975-10-01), Grun et al.
patent: 4021653 (1977-05-01), Sharp et al.
patent: 4121295 (1978-10-01), Witt
patent: 4125900 (1978-11-01), Betts

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