Digital/analog converter, display driver and display

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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Details

C341S153000

Reexamination Certificate

active

06801149

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a switched capacitor digital/analog converter, to a display driver including such a converter, and to a display including such a driver. Such a converter may be used to provide gamma correction, for example, in liquid crystal displays.
2. Description of the Related Art
FIG. 1
of the accompanying drawings illustrates a typical example of a known type of active matrix liquid crystal display (LCD)
1
. The display comprises an active matrix of picture elements (pixels) arranged as rows and columns. The display
1
is connected to a “host”
3
, such as a personal computer graphics card, for supplying image data to the display via a connection
23
, such as a ribbon cable. The display comprises a digital/analog converter (DAC)
5
, which receives an n bit digital word G(0:n−1) and converts this to the corresponding analog voltage. The voltage is supplied to a column electrode
7
by a column controller
9
controlled by a timing and logic circuit
21
.
The timing and logic circuit
21
also controls a row controller
11
, which supplies row select signals in turn to row electrodes such as
15
of the display. An example of one of the pixels of the matrix is shown in detail in FIG.
1
and comprises a thin film transistor (TFT)
13
, whose gate is connected to the row electrode
15
and whose source is connected to the column electrode
7
. The drain of the transistor
13
is connected to a liquid crystal pixel
17
, which is illustrated as and may be considered electrically as a capacitor, and to an optional additional storage capacitor
19
.
As is well known, liquid crystal pixels do not respond linearly to drive voltage amplitude. For example,
FIG. 2
of the accompanying drawing illustrates a typical example of the relationship between the brightness of a liquid crystal pixel and the voltage applied to the pixel. Digital/analog converters convert the input digital word into the appropriate one of a plurality of evenly spaced voltages and eight such voltages V
0
, . . . , V
7
corresponding to a three bit word are illustrated in
FIG. 2
together with the corresponding brightnesses T
0
, . . . , T
7
. The response to evenly spaced applied voltages is highly non-linear. For example, the change in brightness from T
0
to T
1
when the applied voltage changes from V
0
to V
1
is much smaller than the change in brightness from T
2
to T
3
when the applied voltage changes from V
2
to V
3
. The image data are such that equal changes in applied voltage are intended to produce equal changes in brightness and, in order to take account of the non-linear response of liquid crystal pixels, a type of correction known as “gamma correction” has to be performed.
U.S. Pat. No. 6,154,121 discloses a digital/analog converter which provides gamma correction for liquid crystal displays. This is based on a standard type of converter having a linear transfer characteristic together with means for selecting the reference voltages supplied to the converter from a plurality of non-uniformly spaced reference voltages. This technique is based on dividing the non-linear brightness/applied voltage characteristic into a plurality of sub-sections lying between the non-uniformly spaced reference voltages and effectively approximates the curve with a plurality of line segments so as to achieve more evenly spaced brightness levels for evenly spaced inputs. However, this technique requires the generation of the non-uniformly spaced reference voltages. Also, if the converter is not formed or mounted directly on the display substrate, external wires carrying analog voltages must be provided between the converter and the display.
U.S. Pat. No. 5,764,216 discloses a technique for providing gamma correction in the digital domain using a digital memory. When a digital word requesting a specific grey level is supplied, this is converted to the corresponding analog voltage but the digital word is also used to interrogate the memory, which supplies one or more correction bits. The correction bits are used to calculate a correction to the analog voltage supplied by the linear converter. The memory must have sufficient capacity to contain the number of possible grey levels multiplied by the number of correcting bits at each memory address. Also, it is necessary to process additional digital signals during the conversion i.e. n+m bits are required to obtain 2
n
distinct grey levels, where m is the number of bits supplied by the memory.
U.S. Pat. No. 5,796,384 discloses the combination of a digital/analog converter and a memory. This document refers to gamma correction but does not disclose how such correction is performed.
U.S. Pat. No. 5,889,486 discloses an example of a binary weighted switched capacitor digital/analog converter. Converters of this type are based on a set of capacitors whose values are in the ratio of 2:1 and have a linear transfer characteristic in that the analog output voltage is a linear function of the digital input supplied to the converter.
SUMMARY OF THE INVENTION
According to a first aspect of the invention, there is provided a switched capacitor digital/analog converter comprising an input for an n bit digital word, where n is an integer greater than two, and n capacitors having values C
0
, . . . , C
n−1
such that C
x
<C
x+1
for each integer x greater than −1 and less than (n−1), the capacitors having first electrodes which are connected together, each of the capacitors having a second electrode which is connectable to a first or second reference voltage in accordance with the value of a respective one of the bits of n bit word, characterised in that C
y+1
is different from 2·C
y
for at least one integer y greater than −1 and less than (n−1).
C
p+1
/C
p
may be different from C
q+1
/C
q
for at least one integer p greater than −1 and less than (n−1) and at least one integer q different from p and greater than −1 and less than (n−1).
The converter may comprise a terminating capacitor having a first electrode connected to the first electrodes of the n capacitors and a second electrode for receiving the first reference voltage. As an alternative, the converter may comprise a terminating capacitor constituted by parasitic capacitance.
The converter may comprise means for selectively discharging all of the capacitors.
The second electrode of each capacitor of value C
r
may be connectable to the first or second reference voltage in accordance with the value of the rth significant bit of the n bit word for each integer r greater than −1 and less than n.
C
s
may be equal to A
s
·C
0
for each integer s greater than zero and less than n, where each A
s
is an integer greater than zero.
The converter may comprise an output arranged to be switched to at least one further reference voltage in response to at least one predetermined digital word for conversion. The at least one further reference voltage may comprise the first or second reference voltage.
The converter may comprise a circuit for receiving an m bit word for conversion and for supplying to the input the n bit word derived from the m bit word in accordance with a predetermined function, where m is an integer greater than one. For example, m may be equal to n or may be less than n. During a conversion phase, the voltage at the first electrodes may be a non-monotonic function of the n bit digital word and the predetermined function may be such that the voltage at the first electrodes is a monotonic function of the m bit word. The circuit may comprise a combinatorial logic circuit, a memory containing a look-up table, or both.
According to a second aspect of the invention, there is provided a display driver comprising at least one converter according to the first aspect of the invention.
According to a third aspect of the invention, there is provided a display comprising a driver according to the second aspect of the invention.
The at least one converter may be

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