Coded data generation or conversion – Converter compensation
Reexamination Certificate
2003-02-19
2004-11-16
Williams, Howard (Department: 2819)
Coded data generation or conversion
Converter compensation
C341S120000
Reexamination Certificate
active
06819273
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
The present application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2002-077053 filed on Mar. 19, 2002, with the Japanese Patent Office, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor integrated circuits provided with digital-analog-conversion circuits for converting signals between the digital form and the analog form, and particularly relates to a semiconductor integrated circuit provided with a digital-analog-conversion circuit having the function of automatic offset adjustment.
2. Description of the Related Art
In signal processing circuits such as analog-baseband LSIs, digital-analog-conversion circuits for converting signals between the digital form and the analog form may suffer an offset when converted signals deviate from a predetermined level. There is thus a need for a mechanism that automatically adjusts the offset. In related-art mechanisms for automatic offset adjustment, a transmission part for transmitting analog signals after digital-to-analog conversion is provided with an ADC (analog-to-digital converter) for measuring an offset, and a reception part for receiving analog signals with subsequent conversion from analog to digital is provided with a DAC (digital-to-analog converter) for measuring an offset. With this provision, automatic offset adjustment is performed separately in the transmission side and in the reception side.
The transmission part has an offset adjustment mechanism provided for a positive side of the differential output signals and another offset adjustment mechanism provided for a negative node of the differential output signals, thereby performing automatic offset adjustment separately. On the positive side, the DAC for digital-to-analog conversion is set to the code “128” (i.e., code at the midpoint), so that potential at the signal output node is set equal to a middle potential. This potential at the signal output node includes an offset as it deviates from a desired reference potential. The potential at the signal output node is converted into a digital code by the ADC for measuring an offset, allowing the output potential to be measured. The digital code obtained as a result of measurement is then compared with a code corresponding to the reference potential. This provides an offset code, which represents a displacement in codes that corresponds to the offset. Adjustment is made by using the offset code so as to make the offset as close to zero as possible. The same offset measurement and adjustment are performed on the negative side of the differential output signals.
On the reception side, the reference potential is applied to a reception node, and a digital code generated by the ADC for the AD conversion of signals is measured. This digital code is then compared with a reference code (e.g., 128), thereby providing an offset code. This offset code is used to adjust the offset as close to zero as possible.
In the related-art automatic offset adjustment, an ADC needs to be provided for the purpose of measuring an offset as described above. This results in an increase in circuit size and power consumption. Further, a sequence for the measurement and adjustment of an offset needs to be carried out on the reception side while another sequence for the measurement and adjustment of an offset is independently performed on the transmission side. This results in a lengthy offset adjustment.
Accordingly, there is a need for a digital-analog-conversion circuit which can automatically adjust an offset through a short sequence while avoiding an increase in circuit size dedicated for automatic offset adjustment as much as possible.
SUMMARY OF THE INVENTION
It is a general object of the present invention to provide a digital-analog-conversion circuit that substantially obviates one or more of the problems caused by the limitations and disadvantages of the related art.
Features and advantages of the present invention will be set forth in the description which follows, and in part will become apparent from the description and the accompanying drawings, or may be learned by practice of the invention according to the teachings provided in the description. Objects as well as other features and advantages of the present invention will be realized and attained by a digital-analog-conversion circuit particularly pointed out in the specification in such full, clear, concise, and exact terms as to enable a person having ordinary skill in the art to practice the invention.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides an integrated circuit, including an analog signal output unit which converts a digital output signal into at least one analog output signal, and outputs the at least one analog output signal, an analog signal input unit which converts at least one analog input signal received from an exterior into a digital input signal, a switch circuit which provides at least one signal path through which the at least one analog output signal is supplied from the analog signal output unit to the analog signal input unit as the at least one analog input signal, and an offset adjustment control circuit which supplies an output offset from the analog signal output unit to the analog signal input unit via the at least one signal path so as to detect the digital input signal inclusive of the output offset and an input offset, and cancels offsets of the analog signal output unit and the analog signal input unit in response to the output offset and the input offset obtained from the detected digital input signal.
In the digital-analog-conversion circuit described above, signal paths are established between the analog signal output unit and the analog signal input unit, allowing the outputs of the analog signal output unit to be converted into a digital signal by the analog signal input unit, which makes it possible to measure an output offset and an input offset simultaneously. This measurement is repeated with varying conditions, so as to separate the measurement of the output offset from the measurement of the input offset. An offset can thus be adjusted properly in the analog signal output unit and the analog signal input unit.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 5818370 (1998-10-01), Sooch et al.
patent: 6362768 (2002-03-01), Younis et al.
patent: 5-130559 (1993-05-01), None
patent: 2000-278345 (2000-10-01), None
Hitaka Atsushi
Matsuda Atsushi
Minobe Kenichi
Mizutani Tohru
Nanba Hiromi
Arent Fox
Fujitsu Limited
Williams Howard
LandOfFree
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