Digital/analog conversion apparatus

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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Reexamination Certificate

active

06204788

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a digital/analog conversion apparatus for converting a digital signal into an analog signal. More particularly, it relates to an oversampling-type digital/analog conversion apparatus for carrying out digital/analog conversion at a sampling frequency higher than the sampling frequency of a digital input signal.
2. Description of the Related Art
A digital/analog conversion apparatus comprising a noise shaper and a row of 1-bit digital/analog converters is known as a digital/analog conversion apparatus. This conventionally known type of digital/analog conversion apparatus will be described below referring to FIG.
6
. This technology is disclosed in Japanese Laid-open Patent Application No. Hei 5-335963.
FIG. 6
is a block diagram showing an example of a conventional digital/analog conversion apparatus. Referring to
FIG. 6
, a digital filter
10
is used to increase the sampling frequency fs of an input digital signal, for example, a digital audio signal reproduced from a compact disc, by k times (k: an integer). For the purpose of the explanations given hereinafter, it is assumed that fs=44.1 kHz, and that k=64.
A noise shaper
11
is used to carry out quantization (word length limitation) for a digital signal output from the digital filter
10
and to change the frequency characteristic of noise to a predetermined characteristic. More specifically, the frequency characteristic of noise is changed so that the noise level in the low-frequency region is lowered and so that the noise level in the high-frequency region is raised, for example. It is herein assumed that the noise shaper
11
has a tertiary characteristic, and that output Y relative to input X is represented by (Equation 1).
The quantization (word length limitation) of the digital signal will be described below. The word length limitation is to change such a 16-bit signal as used for a CD player to a signal having about four bits. In other words, briefly speaking, only the higher-order 4 bits of the 16-bit signal are output, and the lower-order 12 bits are fed back and added to the next signal input, whereby the information for the 12 bits to be truncated is made alive. This process is referred to as “noise shaping”.
Y=X+
(1
−z
−1
)
3
·Vq
  (Equation 1)
where
Vq: a quantization error
z
−1
=cos &thgr;−j·sin &thgr;
j: an imaginary unit
Furthermore, it is herein assumed that the output Y has seven (=p) output levels (−3 to +3). In addition, to simplify explanations, 3 is added to the output levels, and the output levels in the range of 0 to 6 are used in the following explanations.
A pointer
60
is used to output the remainder of the accumulated value of its input signal. It is herein assumed that the output of the noise shaper
11
is accumulated, and the remainder of the accumulated value, with
6
used as the modulus, is output. When the input of the pointer
60
at time n is assumed to be Xn, the output Yn is represented by (Equation 2).
Yn
=(
Xn
−1
+Yn
−1) mod
6
  (Equation 1)
where
Xn−1: the input at the immediately preceding sample
Yn−1: the output at the immediately preceding sample
A read-only memory (ROM)
61
uses an input signal as an address and outputs
6
(=m=p −1) bit data D
5
to D
0
corresponding to the address. TABLE 1 shows the relationship between the address of the read-only memory
61
and the data. In TABLE 1, “0” is represented by “.” for ease of reading.
TABLE 1
Data
Address
D5
D4
D3
D2
D1
D0
0
.
.
.
.
.
.
1
.
.
.
.
.
1
2
.
.
.
.
1
1
3
.
.
.
1
1
1
4
.
.
1
1
1
1
5
.
1
1
1
1
1
6
1
1
1
1
1
1
As shown in TABLE 1, the read-only memory
61
replaces an input signal with 1-bit signals, the number of which corresponds to the value of the input signal. More specifically, in the case when the of the input signal is 2 for example, two 1-bit signals among six 1-bit signals take on value “1”, and the other 1-bit signals take on value “0”. When the value of the input signal takes on a value other than the above-mentioned value, 1-bit signals, the number of which is the value shown in TABLE 1, take on value “1” and the other 1-bit signals take on value “0”.
A shifter
62
is used to cyclically shift the 6-bit output of the read-only memory
61
in accordance with the output of the pointer
60
. TABLE 2 shows the relationship between the output data D
5
to D
0
of the read-only memory
61
and the output data b
5
to b
0
of the shifter
62
in accordance with the output of the pointer
60
.
TABLE 2
Output data
Pointer
b5
b4
b3
b2
b1
b0
0
D5
D4
D3
D2
D1
D0
1
D4
D3
D2
D1
D0
D5
2
D3
D2
D1
D0
D5
D4
3
D2
D1
D0
D5
D4
D3
4
D1
D0
D5
D4
D3
D2
5
D0
D5
D4
D3
D2
D1
A row of 1-bit digital/analog converters
13
comprises 6 (=m) 1-bit digital/analog converters
13
-
1
to
13
-
6
, each having a uniform characteristic for example, and converts the outputs of the shifter
62
into analog signals.
An analog adder
14
integrates (adds)
6
analog signals output from the row of 1-bit digital/analog converters
13
, and outputs the result as an analog signal.
A digital/analog conversion circuit
15
comprises the row of 1-bit digital/analog converters
13
and the analog adder
14
.
In the digital/analog conversion apparatus shown in
FIG. 6
, a digital input signal is changed to a signal having a sampling frequency of
64
fs and seven (=p) levels by the digital filter
10
and the noise shaper
11
, and then changed to a row of 1-bit signals comprising six 1-bit signals by the pointer
60
, the read-only memory
61
and the shifter
62
, and further converted into an analog signal by the digital/analog conversion circuit
15
. This digital/analog conversion apparatus is the so-called oversampling-type digital/analog conversion apparatus for converting a digital signal into an analog signal by using a sampling frequency higher than the frequency of the digital signal.
FIG. 7
shows the results of a computer simulation of the output signal spectrum of the digital/analog conversion apparatus shown in
FIG. 6
in the case when the digital/analog conversion circuit
15
has an ideal characteristic. As an input signal, a digital signal equivalent to a sinusoidal wave of 2 kHz and 0 dB is supplied. In addition, a signal in the range of 0 to 2 fs (88.2 kHz) is shown. The above-mentioned ideal characteristic is that all the six 1-bit digital/analog converters
13
-
1
to
13
-
6
of the row of 1-bit digital/analog converters
13
have a uniform output.
In this digital/analog conversion apparatus, a digital signal having only seven levels is converted into an analog signal as described above. However, by using the noise shaper
11
, it is possible to obtain a dynamic range of more than 100 dB in the signal frequency band of 0 to fs/2 as shown in FIG.
7
.
Next, the operations of the pointer
60
, the read-only memory
61
and the shifter
62
will be described below.
In
FIG. 7
, an ideal case is assumed, wherein all the six 1-bit digital/analog converters
13
-
1
to
13
-
6
of the row of 1-bit digital/analog converters
13
have a uniform output. However, since it is impossible to produce the 1-bit digital/analog converters
13
-
1
to
13
-
6
completely uniformly in an actual circuit, some variations (relative errors) are present inevitably among the outputs of the 1-bit digital/analog converters
13
-
1
to
13
-
6
. The variations will cause noise and harmonic distortion. To prevent the noise and harmonic distortion, the 1-bit digital/analog converters
13
-
1
to
13
-
6
are cyclically used in the digital/analog conversion apparatus.
The reasons why the noise and harmonic distortion are caused by the variations in the characteristics of the 1-bit digital/analog converters
13
-
1
to
13
-
6
, and the reasons why the harmonic distortion is suppressed by cyclically using the 1-bit digital/analog converters
13
-
1
to
13
-
6
will be described below.
Seven outputs in the ran

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