Chemistry: electrical and wave energy – Apparatus – Electrolytic
Reexamination Certificate
1999-07-12
2001-07-03
Gorgos, Kathryn (Department: 1741)
Chemistry: electrical and wave energy
Apparatus
Electrolytic
C204S242000, C204S275100, C204SDIG007
Reexamination Certificate
active
06254742
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
Not applicable
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not applicable
BACKGROUND OF THE INVENTION
In the production of semiconductor integrated circuits and other semiconductor articles from semiconductor wafers, it is often necessary to provide multiple metal layers on the wafer to serve as interconnect metallization which electrically connects the various devices on the integrated circuit to one another. Traditionally, aluminum has been used for such interconnects, however, it is now recognized that copper metallization may be preferable.
The semiconductor manufacturing industry has applied copper onto semiconductor wafers by using both a “damascene” electroplating process where holes, commonly called “vias”, trenches and/or other recesses are formed onto a substrate and filled with copper and a patterned process where photoresist mask areas are not to be plated. In the damascene process, the wafer is first provided with a metallic seed layer which is used to conduct electrical current during a subsequent metal electroplating step. The seed layer is a very thin layer of metal which can be applied using one or more of several processes. For example, the seed layer of metal can be laid down using physical vapor deposition or chemical vapor deposition processes to produce a layer on the order of 1,000 angstroms thick. The seed layer can advantageously be formed of copper, gold, nickel, palladium, platinum, Pb/Sn Solders, or other metals. The seed layer is formed over a surface which is convoluted by the presence of the vias, trenches, or other recessed device features.
Wafers to be electroplated typically have an annular edge region which is free of seed layer metal. This edge region is referred to as “seed layer edge exclusion.” The seed layer edge exclusion varies in width, measured radially on a wafer, from wafer to wafer depending on the process and apparatus used to deposit the seed layer.
After the seed layer has been applied, a copper layer is then electroplated onto the seed layer in the form of a blanket layer. The blanket layer is plated to an extent which forms an overlying layer, with the goal of providing a copper layer that fills the trenches and vias and extends a certain amount above these features. Such a blanket layer will typically be formed in thicknesses on the order of 8,000 to 15,000 angstroms (1-1.5 microns).
After the blanket layer has been electroplated onto the semiconductor wafer, excess metal material present outside of the vias, trenches, or other recesses is removed. The metal is removed to provide a resulting pattern of metal layer in the semiconductor integrated circuit being formed. The excess plated material can be removed, for example, using chemical mechanical planarization. Chemical mechanical planarization is a processing step which uses the combined action of a chemical removal agent and an abrasive which grinds and polishes the exposed metal surface to remove undesired parts of the metal layer applied in the electroplating step.
The electroplating of the semiconductor wafers takes place in a reactor assembly. In such an assembly an anode electrode is disposed in a plating bath, and the wafer with the seed layer thereon is used as a cathode. Only the lower face of the wafer, with seed layer, needs to contact the surface of the plating bath. The wafer is held by a support system that also conducts the requisite cathode current to the wafer. The support system may comprise conductive fingers that secure the wafer in place and also contact the wafer in order to conduct electrical current for the plating operation, or a perimeter ring contact with seal to define the plating area.
One embodiment of a reactor assembly is disclosed in U.S. Ser. No. 08/988,333, now U.S. Pat. No. 5,985,126, filed Sep. 30, 1997 entitled “Semiconductor Plating System Workpiece Support Having Workpiece—Engaging Electrodes With Distal Contact Part and Dielectric Cover,” herein incorporated by reference.
FIG. 1
illustrates such an assembly. As illustrated, the assembly
10
includes reactor vessel
11
for electroplating a metal, and processing head
12
.
As shown in
FIG. 1
, the electroplating bowl assembly
14
includes a cup assembly
16
which is disposed within a reservoir chamber
18
. Cup assembly
16
includes a fluid cup
20
holding the processing fluid for the electroplating process.
A bottom opening in the bottom wall
30
of the cup assembly
16
receives a polypropylene riser tube
34
which is adjustable in height relative thereto by a threaded connection between the bottom wall
30
and the tube
34
. A fluid delivery tube
44
is disposed within the riser tube
34
. A first end of the delivery tube
44
is secured by a threaded connection
45
to an anode
42
. An anode shield
40
is attached to the anode
42
by screws
74
. The anode shield serves to electrically isolate and physically protect the backside or the anode. It also reduces the consumption of organic plating liquid additives.
The delivery tube
44
supports the anode within the cup. The fluid delivery tube
44
is secured to the riser tube
34
by a fitting
50
. The fitting
50
can accommodate height adjustment of the delivery tube
44
within the riser tube. As such, the connection between the fitting
50
and the riser tube
34
facilitates vertical adjustment of the delivery tube and thus the anode vertical position. The delivery tube
44
can be made from a conductive material, such as titanium or platinum plated titanium, and is used to conduct electrical current to the anode
42
as well as to supply fluid to the cup.
Process fluid is provided to the cup through the delivery tube
44
and proceeds therefrom through fluid outlet openings
56
. Plating fluid fills the cup through the openings
56
, supplied from a plating fluid pump (not shown).
An upper edge of the cup side wall
60
forms a weir which limits the level of electroplating solution or process fluid within the cup. This level is chosen so that only the bottom surface of the wafer W is contacted by the electroplating solution. Excess solution pours over this top edge into the reservoir chamber
18
. The level of fluid in the chamber
18
can be maintained within a desired range for stability of operation by monitoring and controlling the fluid level with sensors, one or more outlet pipes, and actuators.
The processing head
12
holds a wafer W for rotation about a vertical axis R within the processing chamber. The processing head
12
includes a rotor assembly having a plurality of wafer-engaging fingers
89
that hold the wafer against holding features of the rotor. Fingers
89
are preferably adapted to conduct current between the wafer and a plating electrical power supply and act as current thieves. Portions of the processing head
12
mate with the processing bowl assembly
14
to provide a substantially closed processing volume
13
.
The processing head
12
can be manipulated by a head operator as described in the aforementioned U.S. Ser. No. 08/988,333. Pivotal action of the processing head using the operator allows the processing head to be placed in an open or faced-up position (not shown) for loading and unloading wafer W.
Processing exhaust gas must be removed from the volume
13
as described in the aforementioned U.S. Ser. No. 08/988,333.
A diffusion plate or “diffuser”
66
is provided above the anode
42
for providing a more controlled distribution of the fluid plating bath across the surface of wafer W. Fluid passages in the form of perforations are provided over all, or a portion of, the diffusion plate
66
to allow fluid communication therethrough. The height of the diffusion plate within the cup assembly is adjustable using threaded diffusion plate height adjustment mechanisms
70
.
In the prior diffuser
66
, the holes are arranged in an X-Y rectangular grid or in a diamond grid pattern. Some holes are then blocked off based on experimental optimization of the plating process to reduce non-uniformities in metallization thickness
Hanson Kyle M.
Simchuk Jerry
Thompson Raymon F.
Weaver Robert A.
Coie LLP Perkins
Gorgos Kathryn
Nicolas Wesley A.
Semitool Inc.
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