Differentiator, rectifier, mixer, and low-pass filter circuit

Details Differentiator, rectifier, mixer, and low-pass filter circuit Differentiator, rectifier, mixer, and low-pass filter circuit

1997-09-30

2000-12-19

Vo, Don N.

Pulse or digital communications

Synchronizers

327165, H04L 700

Patent

active

061635820

ABSTRACT:
An improved clock recovery circuit is disclosed. A first inverter pulse generator and a second inverter pulse generator for receiving nonreturn-to-zero (NRZ) data and in response thereto generating a signal having a frequency (f) is provided. A differential pair that is coupled to the first and second inverter pulse generators for mixing the signal provided by the pulse generators and a clock signal is provided.

REFERENCES:
patent: 5012494 (1991-04-01), Lai et al.
patent: 5164966 (1992-11-01), Hershberger
patent: 5594763 (1997-01-01), Nimishakavi
patent: 5666388 (1997-09-01), Neron
patent: 5671258 (1997-09-01), Burns et al.
patent: 5812619 (1998-09-01), Runaldue
Behzad Razavi, "A 2.5-Gb/s 15-mW Clock Recovery Circuit", IEEE Journal of Solid-State Circuits, vol. 31, No. 4, pp. 472-480, Apr. 1996.

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