Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
1998-08-28
2001-03-06
Mai, Tan V. (Department: 2121)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S490000
Reexamination Certificate
active
06199085
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a filter, and more particularly, to a reduced size comb filter.
2. Background of the Related Art
In general, a comb filter is provided with a differentiator and an integrator. If it is assumed that a down sampling ratio is “M” and a stage number is “N”, a transmission function “H(Z)” of the comb filter may be expressed as follows.
H
⁡
(
Z
)
=
Y
⁡
(
Z
)
X
⁡
(
Z
)
=
(
1
-
Z
-
M
1
-
Z
-
1
)
N
=
(
1
-
Z
-
M
)
N
←
Differentiator
(
1
-
Z
-
1
)
N
←
Integrator
Thus, there is a differentiator and an integrator in a comb filter, and the present invention is related to the differentiator. A background art differentiator in a comb filter will now be described.
FIG. 1
illustrates a hardware system of the background art differentiator having a down sampling ratio M=“1” and a stage number N=“5”.
In the above transmission function, the differentiator transmission function is (1−Z
−M
)
N
. If a down sampling is “1”(M=1) and a number of stages is “5”(N=5), the differentiator transmission function will be (1−Z
−1
)
5
, which may be expressed by equation (1) as follows.
(1
−Z
−1
)
5
=1−5
Z
−1
+10
Z
−2
−10
Z
−3
+5
Z
−4
−Z
−5
(1)
A hardware system of the background art differentiator for implementing the differentiator transmission function of equation (1) is as shown in FIG.
1
. The background art differentiator is provided with five subtractors
1
to
5
and five flipflops
6
to
10
. A first flipflop
6
is for receiving and delaying a signal X(n), and a first subtractor
1
is for subtracting a signal delayed by the first flipflop
6
from the signal X(n). A second flipflop
7
is for receiving and delaying a signal from the first subtractor
1
, and a second subtractor
2
is for subtracting a signal from the second flipflop
7
from the signal from the first subtractor
1
. A third flipflop
8
receives and delays a signal from the second subtractor
2
, and a third subtractor
3
subtracts a signal from the third flipflop
8
from the signal from the second subtractor
2
. A fourth flipflop
9
is for receiving and delaying a signal from the third subtractor
3
, and a fourth subtractor
4
for subtracting a signal from the fourth flipflop
9
from the signal from the third subtractor
3
. A fifth flipflop
10
is for receiving and delaying a signal from the fourth subtractor
4
, and a fifth subtractor
5
is for subtracting a signal from the fifth flipflop
10
from the signal from the fourth subtractor
4
. When a master clock of the comb filter is {fraction (1/128)} fs, a CLK-DIFF clock of ¼ fs is applied to clock terminals on the flops
6
-
10
.
The operation of the background art comb filter differentiator will now be described.
FIG. 2
illustrates a timing diagram of a clock signal of the differentiator shown in FIG.
1
.
Referring to
FIG. 2
, when the background art comb filter system has a master clock of 128 fs, a cycle Tm of the master clock is {fraction (1/128)} fs and a cycle Tc of the CLK-DIFF is ¼ fs. The signal X(n) is received in the order D
1
, D
2
, D
3
, D
4
, —with intervals of ¼ fs. Since each subtractor conducts a subtraction only when the CLK-DIFF signal is received, the subtraction occurs in intervals of T
1
-T
2
, T
33
-T
34
and the like.
FIG. 3
illustrates a data flow in the background art differentiator. The differentiator forwards signals Y(n) at ¼ fs intervals as shown in FIG.
3
.
As described above, the background art comb filter differentiator has various problems. While a time period required for calculating one data is T
1
-T
2
in the background art differentiator in a comb filter, all subtractors are idle in the rest of the time period T
3
-T
33
. Accordingly, the background art comb filter differentiator has a low efficiency. Further, one subtractor per stage is provided, which increases device size and costs.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a differentiator in a comb filter that substantially obviates one or more of the problems caused by limitations and disadvantages of the related art.
Another object of the present invention is to provide a differentiator in a comb filter, which has a reduced hardware.
Another object of the present invention is to provide a differentiator in a comb filter that has a reduced cost.
Another object of the present invention is to provide a differentiator in a comb filter that has a reduced size.
Another object of the present invention is to provide a differentiator in a comb filter that has an increased efficiency.
To achieve at least these objects and other advantages in a whole or in parts and in accordance with the purpose of the present invention, as embodied and broadly described, the differentiator in a low pass filter includes a first delay circuit that receives a clock signal and an input signal and repeatedly delays the input signal to generate a plurality of delayed signals, a selection circuit that receives the delayed signals from the first delay and outputs a selected delayed signal of the delayed signals and a resettable accumulator that receives the selected signal from the selection circuit and outputs a value.
To further achieve these objects and other advantages in a whole or in parts and in accordance with the purpose of the present invention, as embodied and broadly described, a differentiator in a comb filter includes a first delay that receives an input signal and repeatedly delays the input signal to generate a plurality of delayed signals, a selector that receives the delayed signals from the first delay and outputs a selected delayed signal of the delayed signals, an operator that subjects the selected signal and a feed-back signal to processing in response to a control signal, a second delay that receives a clock signal and an output signal from the operator and outputs an accumulated signal and a logic-gate that logically processes an output from the second delay and outputs the feed-back signal to the operator.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
REFERENCES:
patent: 4215416 (1980-07-01), Miramatsu
patent: 4701956 (1987-10-01), Katoh
patent: 4949292 (1990-08-01), Hoshino et al.
patent: 5451952 (1995-09-01), Yamazaki et al.
patent: 5506798 (1996-04-01), Shimada et al.
patent: 5831879 (1998-11-01), Yom et al.
B.P. Brandt et al., “A Low-Power, Area-Efficient Digital Filter for Decimation and Interpolation,” IEEE Journal of Solid-State Circuits, vol. 29, No. 6, Jun. 1994 pp. 679-687.
Fleshner & Kim LLP
Hyundai Electronics Industries Co,. Ltd.
Mai Tan V.
LandOfFree
Differentiator in comb filter does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Differentiator in comb filter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Differentiator in comb filter will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2511900