Differential voltage-to-current converter

Electric power conversion systems – Current conversion – Constant current to constant voltage or vice versa

Reexamination Certificate

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Details

C323S315000, C327S103000

Reexamination Certificate

active

06219261

ABSTRACT:

The role of electronics of signal conditioning/processing in modern telecommunications equipment (but also in other electronic equipment) continues to grow and the need for fast and accurate analog electronics for signal processing is becoming more and more important.
Main requirements of analog part of signal conditioning/processing electronics include:
DC precision: low Vos (input offset voltage); low Ios (input offset current) and low Ib (bias current);
AC precision (Low Noise, Wide Power-Bandwidth and Low Distortion);
High speed and wide dynamic range.
Some of such requirements are in contrast with the others, which gives rise to the following problems:
it is difficult to provide simultaneously good precision and high speed;
it is difficult to provide dynamic performance which are signal level independent, due to non-linearity of critical analog parts and/or limited dynamic range, which make dynamic performance depend on signal amplitude.
Reference should be made to the annexed
FIG. 1
, in order to better understand these problems; this figure shows, in a digital/analog converter (DAC), an example of an application of analog conditioning techniques wherein precision and high speed are required. In this figure, the term &egr;s in the output voltage is the static error contribution which depends on Vos, Ios, and Ib, mainly controlled by the input stage characteristics of circuit A
1
, while the term of dynamic error &egr;d depends on the internal non-linearities of A
1
, and results within the frequency domain, in limited harmonic performance as for distortion/intermodulation, in a undesired phase modulation of frequency response and reduced power bandwidth, while in the time domain results in poor slewing/settling behaviour which can be very sensitive to signal amplitude, thus resulting in long Full-Scale Settling Times ts.
Similar reasonings apply to the natural counterpart of DACs, i.e. the Anzloo to Digital Conversion (ADC) process.
The general problem in this area can be assessed referring to the simple block diagram in the annexed
FIG. 2
, which highlights the first order elements that determine the dynamic performance of a generic amplifier
The input stage of this amplifier is a voltage to current converter (V/I) which converts the differential input voltage Vi=(V
1
−V
2
) into the current Io, according to the relationship I
0
=(V
1
−V
2
)g
m
. We can define a static transconductance, G
m
=I
0
/V
i
, as the ratio of the absolute output current Io over the input voltage Vi=V
1
−V
2
, and a differential or local transconductance as g
m
=&dgr;i
0
/&dgr;V
i
, where &dgr;Io is the small change of the output current due to the corresponding small change &dgr;Vi, as a function of Vi. In the ideal case G
m
=g
m
(Vi=0)=g
mo
=Cost, but in all practical cases transconductance is a function of the input voltage Vi.
Assuming A
1
→∞ input-output transfer function of
FIG. 2
can be written as
V
0
(
V1
-
V2
)
=
g
m
j



ω



Co
=
j



f
T
/
f
(
1
)
where f
T
=g
m
/2&pgr;Co  (2)
is the unity gain frequency.
Maximum stable frequency f
T
(max) (that is with a phase-margin better than 45 degrees) depends on the device technology employed and on the circuit architecture.
Let us refer now to the block diagram of a feedback loop employing an operational amplifier, as shown in FIG.
3
.
In this case, the first order closed loop transfer function is:
Vo
Vi
=
Go
1
+
j



Gof
/
f
T
(
3
)
The step response is given by
Vo(t)=V
P
[1−e
−t/&tgr;
]  (4)
where V
p
is the amplitude of output step, and &tgr;=Go/2&pgr;f
T
Therefore, the expression of the settling times t
s
within (1−&ggr;) of the final value results in
t
s

(
γ
)
=
τln

[
1
/
(
1
-
γ
)
]
=
GoCo
g
m

ln

[
1
/
(
1
-
γ
)
]
(
5
)
Equation (5) clearly illustrates the important role of the input stage transconductance on settling time performance of feedback amplifiers.
Note that, assuming all parameters in equation (5) constant regardless of Vi amplitude, ts is not dependent on the step amplitude Vp.
The problem is that, while in the ideal case g
m
is constant over the full input voltage dynamic range, in all practical cases g
m
is a function of (V
1
−V
2
), therefore, according to equation (5), also ts rapidly changes with the amplitude of input voltage (it increases when decreasing g
m
).
The result is that the complete data acquisition/processing system has to be designed for the worst case of settling time, i.e. ts(fs), which will consequently reduce system performances.
A few solutions of the above referenced problems are known, but they have several drawbacks.
A first solution is to use large value resistors for emitter (source) degeneration and to increase correspondingly the emitter (source) current IB of the differential input stage, in order to increase the dynamic range, while keeping the transconductance value constant.
However, according to such a solution, DC and AC precisions get worse and Vos, Ios and Ib, as well as the noise, are higher than in undegenerated input stages. Moreover, the dynamic range is wider, but is still limited. And the dependence of ts on voltage step Vp is still large, mainly because of mechanisms limiting the slewing/settling performance, which are typical in stages operating in class A.
A second solution is to use input stages capable of operating in class AB, in order to increase by orders of magnitude the dynamic range, output current range and amplifier slewing capability. With this solution, DC and AC precisions are slightly worse (Vos, Ios and Ib are larger and the noise is larger) with respect to conventional class A devices and, furthermore, it is hard to achieve a constant transconductance of the input stage throughout the dynamic range, while gm changes from 30% to 100% are to be expected.
A third solution is to use analog function based on current feedback architectures, which offer a good transconductance performance and very high speed. However, DC and AC precisions in this solution are poor with respect to the ones achievable with the previous techniques based on the principle of voltage feedback (larger Vos, Ios and Ib; higher noise). Moreover, DC open loop gain is usually limited to 70-90 dB, while DC open loop gain of voltage feedback architectures may extend beyond 140 dB. Such a gain limitation generally results in lower performances at low frequency and higher sensitivity to temperature, production tolerances, load changes and so on.
On the other hand, the problems already set forth find a good solution by means of the present invention, whereby an improved architecture is provided to a differential voltage-to-current converter, working in class AB, with constant transconductance and wide dynamic range.
Such a converter is characterised in that it essentially comprises two complementary pairs of transistors, respectively of pnp and npn type, and two nominally equal resistors, the emitters of the first pair transistors being connected to the respective ones of the second pair transistors through two resistors having equal nominal resistance, a junction being provided between the emitters of the second pair transistors; and in that input voltages are applied to the bases of first pair transistors, from collectors of which output currents are taken.
Advantageously, biasing and thermal balancing circuits are connected, in this converter, to the first and, respectively, to the second transistors of said two transistor pairs. More exactly, said biasing and thermal balancing circuits are connected to the first and, respectively, to the second transistors of said pairs, between bases thereof, the polarity of bases of the first pair transistors being negative with respect to the one of bases of second pair transistors.


REFERENCES:
patent: 4338527 (1982-07-01), Nagano
patent: 4757273 (1988-07-01), Bray
patent: 4797629

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