Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Patent
1993-06-04
1994-05-17
Young, Brian K.
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
330252, H03M 112
Patent
active
053132076
ABSTRACT:
An improved differential subtracter 3a and an improved D/A converter 7a are used in a two-step parallel A/D converter 100. The D/A converter is responsive to complementary signals S1-S2 and B1-Bn indicative of results of conversion of higher bits to draw subtraction currents Is1 and Is2 through emitter electrodes of npn transistors Q1 and Q2. Since a difference between emitter currents I.sub.E1 and I.sub.E2 is small, base-emitter voltages V.sub.BE1 and V.sub.BE2 are substantially equal to each other. As a result, the A/D converter can execute the subtraction at high speed with high accuracy.
REFERENCES:
patent: 4511852 (1985-04-01), Henrich et al.
patent: 5072220 (1991-12-01), Petschacher et al.
Petschacher et al. "A 10-b 75-MSPS Subranging A/D/ Converter with Integrated Sample and Hold" IEEE Journal of Solid-State Circuits, vol. 25, No. 6 1990, pp. 1339-1346.
Shimizu et al. "A 10-Bit 20-MHz Two-Step Parallel A/D Converter with Internal S/H" IEEE Journal of Solid-State Circuits, vol. 24, No. 1 1989, pp. 13-20.
Nobuo Fujii "Analog Electronic Circuits", pp. 136-141 (with comments), 1989.
Kouno Hiroyuki
Kumamoto Toshio
Miki Takahiro
Mitsubishi Denki & Kabushiki Kaisha
Young Brian K.
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