Differential signal detection circuit

Details Differential signal detection circuit Differential signal detection circuit

1999-09-03

2001-02-27

Mottola, Steven J. (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including differential amplifier

C327S307000

Reexamination Certificate

active

06194965

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a detection circuit generally and, more particularly, to a differential signal detection circuit.
BACKGROUND OF THE INVENTION
Referring to
FIG. 1
, a circuit
10
illustrates such a conventional approach for implementing a detection circuit. The circuit
10
generally comprises a number of comparators
12
a
-
12
n
, a number of resistors
14
a
-
14
n
, a number of capacitors
16
a
-
16
n
and an inductor
18
.
The circuit
10
detects signals primarily through signal peak detection. Input signals are not detected differentially, but compared the positive input transitions with an externally set common mode offset voltage. The capacitor
16
n
is charged when valid signals are present and discharge through a bleed resistor.
Referring to
FIG. 2
, a circuit
40
is shown illustrating another conventional detection circuit. The circuit
40
generally comprises a detector logic block
42
, a comparator
44
, a comparator
46
and a voltage offset current stealing circuit
48
. The circuit
40
takes advantage of current stealing to set a trip threshold level. An offset voltage is created between the gates of a differential pair in the stealing circuit. The stealing circuit differential pair is matched to the comparator differential pair, and their drains are connected together. When the voltages at the comparator inputs are equal, the currents through them are unequal by the amount taken by the stealing circuit. A trip point threshold is reached when comparator inputs are unequal by the offset voltage at the stealing circuit. The currents into the comparator differential pair will become equal. As the comparator voltage increases beyond the offset voltage, the output state of the comparator will change.
The circuit
10
uses discrete components which can false trigger with common mode noise. The circuit
40
requires separate differential pairs to create the threshold and comparison circuits. The differential pairs are required to match (or track) each other over process and temperature variations. The currents setting the threshold could be small and difficult to control.
SUMMARY OF THE INVENTION
The present invention concerns an apparatus comprising a first circuit and a second circuit. The first circuit may be configured to present a first detected data signal in response to (i) one or more first voltages, (ii) one or more second voltages, and (iii) a first reference voltage having a first common mode offset. The second circuit may be configured to present a second detected data signal in response to (i) said one or more first voltages, (ii) said one or more second voltages, and (iii) a second reference voltage having a second common mode offset.
The objects, features and advantages of the present invention include providing a differential signal detection circuit that may (i) use a plurality of independent comparators to detect valid serial differential data amplitudes, (ii) dynamically adjust threshold trip points based on input common mode voltage and/or (iii) implement post detection OR functions to detect any phase combination of valid data.


REFERENCES:
patent: 5663680 (1997-09-01), Nordeng
patent: 5703516 (1997-12-01), Takashima
patent: 5796301 (1998-08-01), Tanabe et al.
patent: 5939904 (1999-08-01), Fetterman et al.
HOTLINK™ Transmitter/Receiver CY7B923 and CY7B933, Cypress Semiconductor Corporation, Apr. 5, 1999, pp. 1-35.

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