Differential sensing of single ended memory array

Details Differential sensing of single ended memory array Differential sensing of single ended memory array

1979-11-01

1981-11-17

Hecker, Stuart N.

Static information storage and retrieval

Floating gate

Particular biasing

365207, G11C 1140, G11C 700

Patent

active

043015182

ABSTRACT:
A single-ended array of rows and columns of memory cells of the floating gate EPROM type employs a differential sense circuit for producing a data output voltage. The sense circuit allows the array to be biased independent of the sense operation. A reference voltage is provided for direct comparison to the operating point of the selected column line, producing a differential voltage whose polarity indicates the logic state of the selected cell.

REFERENCES:
patent: 3851317 (1974-11-01), Kenyon
patent: 3992701 (1976-11-01), Abbas et al.
patent: 4090257 (1978-05-01), Williams
patent: 4094008 (1978-06-01), Lockwood et al.
Haug et al., "Programmable Read-Only Memory", IBM Tech Disc. Bul., vol. 18, No. 2, 7/75, pp. 445-446.

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