Differential sense amplifier circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

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Details

327 57, G11C 706

Patent

active

061540641

ABSTRACT:
A sense amplifier having four NMOS transistors and two resistors is operable at voltage supplies less than 2.5 volts and has a fast response time. The drain terminals of two of the NMOS transistors, each receiving an input voltage signal at its gate terminal, provide a differential output voltage signal across the two resistors. The source terminals of these two NMOS transistors are coupled to the drain and gate terminals of a cross-coupled second pair of NMOS transistors. The amplifier exhibits negative input capacitance at each of its input terminals. The amplifier has a common mode input voltage that is substantially equal to the common mode output voltage, facilitating the cascading of many stages of the amplifier. Each stage of a multi-stage cascade of the amplifiers has a greater than unity voltage gain if driving a low capacitance line or a smaller than unity gain if driving a high capacitance line.

REFERENCES:
patent: 4871933 (1989-10-01), Galbraith
patent: 4973864 (1990-11-01), Nogami
patent: 5231318 (1993-07-01), Reddy
patent: 5585747 (1996-12-01), Proebsting
patent: 5894233 (1999-04-01), Yoon

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