Differential sampler structures with reduced distortion and...

Coded data generation or conversion – Sample and hold

Reexamination Certificate

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Details

C341S162000, C327S096000

Reexamination Certificate

active

06650263

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to signal-conditioning systems and, more particularly, to samplers in these systems.
2. Description of the Related Art
Samplers are essential elements in a variety of signal-conditioning systems (e.g., analog-to-digital converters). Although sometimes referred to as track-and-holds, sample-and-holds and sample-hold amplifiers (SHAs), all samplers share the task of successively “freezing” a fast-moving input signal to provide samples that facilitate further processing in an associated signal-conditioning system. The rate and timing of the “freezing” or sampling is generally set by a system clock signal.
The input signal is typically stored on a capacitor which is decoupled from the input signal by a switch that responds to the clock signal. A buffer (i.e., a buffer stage or buffer amplifier) is generally inserted to pass the input signal to the capacitor and switch and thereby present a high impedance to the input-signal source and provide current gain to enhance signal drive of the capacitor.
Although the size of the capacitor is preferably reduced to limit the current required from the buffer, it must be large enough to generate sample amplitudes that will realize a desired signal-to-noise ratio at the sampler's output. The size of the capacitor cannot, therefore, be reduced below a limit capacitance C
lmt
that is set by the desired signal-to-noise ratio.
Accordingly, the buffer must provide currents to a capacitance at least equal to C
lmt
that are sufficiently large to achieve a slew rate across the corresponding capacitor that maintains fidelity of the samples. As the frequency of the input signal increases, this current demand also increases to offset the corresponding decrease of the capacitor's impedance. Insufficient current will fail to maintain the required slew rate (i.e., slew-rate limiting will occur) and will, therefore, generate distortion in the samples.
The buffer generally includes an emitter follower (or source follower) and an associated current source to bias the emitter follower. Even though the emitter follower may have sufficient current gain, insufficient current from the current source will cause current variations in the emitter follower which generate variations in its base-to-emitter voltage V
be
(or gate-to-source voltage V
gs
). Because this voltage is in the signal path, these variations also generate distortion in the samples.
These sample distortion sources have typically been reduced by increasing the current of the current source but this has effects (e.g., degraded efficiency and increased heating) which are highly undesirable in modern signal-conditioning systems.
BRIEF SUMMARY OF THE INVENTION
The present invention is directed to differential sampler structures that reduce signal distortion and current demand.
These goals are realized with first and second buffers that drive first and second capacitors and first and second switches. First and second current pumps are capacitively coupled and also cross: coupled to the first and second capacitors relative to the coupling of the first and second buffers to these capacitors. Reduced signal distortion is obtained along with reduced current demand.


REFERENCES:
patent: 5361068 (1994-11-01), Llewellyn
patent: 5515003 (1996-05-01), Kimura
patent: 5606320 (1997-02-01), Kleks
patent: 6255865 (2001-07-01), Opris
patent: 6300811 (2001-10-01), Dick
patent: 6359577 (2002-03-01), Weigel
US 2002/0093752; Pakriswamy et al. High Bandwidth low noise crosscoupled amplifier, Jul. 18, 2002.

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