Differential line driver

Details Differential line driver Differential line driver

1999-03-01

2002-06-25

Cunningham, Terry D. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S110000, C326S030000, C326S083000

Reexamination Certificate

active

06411136

ABSTRACT:

This application claims priority under 35 U.S.C. §§ 119 and/or 365 to 9800635-6 filed in Sweden on Mar. 2, 1998; the entire content of which is hereby incorporated by reference.
BACKGROUND
The invention regards a CMOS differential line driver, in particular for driving a line comprising a twisted copper pair, and having a differential input with two input terminals and a differential analog output with two output terminals, which are each provided with a termination resistor. It is intended primarily for use with twisted copper pairs or the like as used for high speed applications, such as high speed internet access.
A traditional type of a fully differential line driver is shown schematically in FIG.
1
. The twisted copper pair
1
is fed with power via a transformer
2
. In order to obtain impedance matching, the transformed impedance of the twisted copper pair must be matched by termination resistors R
t
.
A full description of an embodiment of this prior art is given in the article by Khorramabadi, IEEE J. Solid-State Circuits, Vol. 27 No. 4, (1992) p. 539, which is hereby included by reference into the present disclosure. General problems with line drivers are exposed in Johns and Essig, Integrated Circuits for Data Transmission Over Twisted-Pair Channels, IEEE J. Solid-State Circuits, Vol. 32 No. 3 (1997) p. 398.
This known architecture has several drawbacks. The line driver must have a low output impedance and high common-mode rejection, since very high voltage in the copper wire may be coupled back as common-mode signals via parasitic capacitance. The input-dependent variation in the output impedance of the line driver must also be very small in order to have low distortion. Therefore, effective feedbacks are needed in the line driver. Improper compensation in the line driver may result in low signal bandwidth and/or instability.
To deliver a high power to the line driver, a high supply voltage is usually needed.
A line driver of the envisaged type would usually be handling signals from a high speed digital-to-analog converter (DAC) for high speed internet access. It is normal for such high speed DACs to be arranged as current-output devices, meaning that the driving DAC would have a high output impedance. In order to minimize the distortion in the DAC, the input impedance of the line driver must be low.
It is an object of the invention to obtain a fully differential line driver, which obviates the above-mentioned difficulties. Another object is to obtain such a driver which can be made with a standard 5-V CMOS process. This would even enable its integrating with a driving DAC on a single chip. A further object is to obtain very low distortion at high bandwidth without stability problems.
SUMMARY
Said objects and other objects and advantages are obtained, according to the invention, with a line driver of the kind mentioned, and which is provided such
(i) that the said input is a current input,
(ii) that the driver comprises two current amplifiers (A
p
, A
n
), each forming a said input terminal (I
inp
, I
inn
) and a said output terminal (I
op
, I
on
) respectively, and provided for feeding with a drive voltage (V
cc
)
(iii) that said termination resistors (R
t
) are connected with first ends to said output terminals (I
op
, I
on
) and have second ends connectible to a drive voltage (V
ddh
).
Typical for the inventive solution is that amplifying circuits are used, which are current amplifying, enabling the obtaining of a low input impedance and a high output impedance. For obtaining high common-mode rejection and impedance matching, termination resistors are arranged.


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Khorramabadi, H., A CMOS Line Driver with 80-dB Linearity for ISDN Applications, IEEE Journal of Solid-State Circuits, vol. 27, No. 4, Apr. 1992.
John, David et al., “Integrated Circuits for Data Transmission Over Twisted-Pair Channels”, IEEE Journal of Solid-State Circuits, vol. 32, No. 3, Mar. 1997.

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