Differential latch sense amlifiers using feedback

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

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327 52, 327 54, 327 55, 327185, 365207, H03K 524, H03K 326, G11C 700

Patent

active

055044433

ABSTRACT:
A differential latch sense amplifier for memories has (a) a first differential input circuit for detecting and shifting the voltage levels of the first and second input signals and coupled to first and second sense nodes, (b) a cross-coupled latch for providing gain to the first and second sense nodes, (c) a precharge circuit for precharging and equalizing the first and second sense nodes, (d) a first tristatable output driver for providing a first feedback, for outputting the voltage of the first sense node to a first output node, and for receiving data, (e) a second tristatable output driver for providing a second feedback, for outputting the voltage of the second sense node to a second output node, and for receiving data, and (f) a first feedback circuit for increasing the voltage gain and decreasing the sense output response time at the first and second sense nodes and for being controlled by the first and second tristatable output drivers. The feedback circuit is coupled to the first and second tristatable output drivers in such a way that the feedback circuit is disabled during a standby period or between read or write cycles. To minimize layout area, the differential latch sense amplifier may further include a second differential input circuit and a second feedback circuit sharing the cross-coupled latch and precharge circuits. To write data into the memory cells, the differential latch sense amplifier has data transfer pass gates controlled by a west write circuit and an east write circuit.

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