Differential latch circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

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Details

327212, 327219, H03K 3356

Patent

active

055086489

ABSTRACT:
A differential latch circuit which places very little capacitance on the clock line is described. The invented differential latch circuit utilizes differential data signals, and thus, has two data lines. The transfer portion of the latch receives the differential data signals and passes them to the storage portion responsive to a control signal. The storage portion stores and outputs the differential data signals. In a first embodiment, each data line in the transfer portion comprises a single transistor pass gate for selectively passing one of the differential data signals responsive to the control signal, which is coupled to the gate terminals of both pass gates.

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patent: 5140179 (1992-08-01), Takano
patent: 5173870 (1992-12-01), Sukashita et al.
patent: 5216295 (1993-06-01), Hoang
patent: 5239206 (1993-08-01), Yanai
patent: 5281865 (1994-01-01), Yamashita et al.

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