Differential integrator having offset and gain compensation, not

Details Differential integrator having offset and gain compensation, not Differential integrator having offset and gain compensation, not

1998-12-14

2000-12-26

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

By integrating

327554, G06F 764

Patent

active

061665819

ABSTRACT:
Disclosed is a fully differential switched-capacitor integrator which accepts a single-ended or unbalanced input signal and compensates the offset and finite gain of the operational amplifier without an extra converter circuit. The proposed circuit utilizes a special input structure which adds special capacitors to store the offset and the low frequency noise of the operational amplifier. One preferred embodiment implements the switching means as transmission gates using CMOS transistors. Clock feedthrough is prevented by providing two non-overlapping clock phases with a delayed clock each, thus avoiding clock feed-through. The invention provides a good alternative for applications such as low noise filters and sigma delta modulators.

REFERENCES:
patent: 4647865 (1987-03-01), Westwick
patent: 4746871 (1988-05-01), de la Plaza
patent: 4896156 (1990-01-01), Garverick
patent: 4988900 (1991-01-01), Fensch
patent: 5220286 (1993-06-01), Nadeem
patent: 5410270 (1995-04-01), Rybicki et al.
patent: 5736895 (1998-04-01), Yu et al.
patent: 5739720 (1998-04-01), Lee
K. Nagaraj et al; Switched -Capacitor Circuits with Reduced Sensitivity to Amplifier Gain, IEEE Transactions on Circuits and Systems, vol. CAS-34, pp. 571-574, May 1987.

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