Differential input stage for electronic equipment,...

Telephonic communications – Subscriber line or transmission line interface – Power supply

Reexamination Certificate

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C379S405000, C330S258000

Reexamination Certificate

active

07054439

ABSTRACT:
According to the invention, means for reducing the interference caused by a voltage or a current in common mode, comprise adders (S3; S4) in each path for adding a first counter-reaction voltage (V1) to the voltage of the relevant path, a bridge (R1, R2) and an inverter (I3) for provision of said first counter-reaction voltage which is equal to half the sum of the voltages (VA, VB), respectively supplied to the inputs (A; B), with an opposing sign. According to the invention, the effect of a delay introduced by the inverter (I3) may be reduced, whereby said stage further comprises means (S5; S6) for adding in addition to the input voltage for each path, a second counter-reaction voltage (Va1; Vb1), and means (R1, R2, I1, S1; I2, S2) for provision of a second counter-reaction voltage (Va1; Vb1) which is a function of the input voltage (VA; VB) at the input corresponding to said path, with an opposing sign and with a delay identical to that generated by the inverter (I3).

REFERENCES:
patent: 3516005 (1970-06-01), Brown, Jr.
patent: 3761831 (1973-09-01), Foerster
patent: 4612417 (1986-09-01), Toumani
patent: 5329585 (1994-07-01), Susak et al.
patent: 0 396 351 (1990-11-01), None

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